Re: [PATCH v2 2/3] clk: bcm2835: Support for clock parent selection

2015-12-05 Thread Eric Anholt
Remi Pommarel writes: > On Thu, Dec 03, 2015 at 04:37:07PM -0800, Eric Anholt wrote: >> Remi Pommarel writes: >> >> > On Wed, Nov 18, 2015 at 10:30:17AM -0800, Eric Anholt wrote: >> > >> > [...] >> > >> >> > +static int bcm2835_clock_determine_rate(struct clk_hw *hw, >> >> > + str

Re: [PATCH v2 2/3] clk: bcm2835: Support for clock parent selection

2015-12-04 Thread Remi Pommarel
On Thu, Dec 03, 2015 at 04:37:07PM -0800, Eric Anholt wrote: > Remi Pommarel writes: > > > On Wed, Nov 18, 2015 at 10:30:17AM -0800, Eric Anholt wrote: > > > > [...] > > > >> > +static int bcm2835_clock_determine_rate(struct clk_hw *hw, > >> > +struct clk_rate_request *req) > >> >

Re: [PATCH v2 2/3] clk: bcm2835: Support for clock parent selection

2015-12-03 Thread Eric Anholt
Remi Pommarel writes: > On Wed, Nov 18, 2015 at 10:30:17AM -0800, Eric Anholt wrote: > > [...] > >> > +static int bcm2835_clock_determine_rate(struct clk_hw *hw, >> > + struct clk_rate_request *req) >> > +{ >> > + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); >> > + struct c

Re: [PATCH v2 2/3] clk: bcm2835: Support for clock parent selection

2015-11-18 Thread Remi Pommarel
On Wed, Nov 18, 2015 at 10:30:17AM -0800, Eric Anholt wrote: [...] > > +static int bcm2835_clock_determine_rate(struct clk_hw *hw, > > + struct clk_rate_request *req) > > +{ > > + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); > > + struct clk_hw *parent, *best_parent = NU

Re: [PATCH v2 2/3] clk: bcm2835: Support for clock parent selection

2015-11-18 Thread Eric Anholt
Remi Pommarel writes: > Some bcm2835 clocks used by hardware (like "PWM" or "H264") can have multiple > parent clocks. These clocks divide the rate of a parent which can be selected > by > setting the proper bits in the clock control register. > > Previously all these parents where handled by a

[PATCH v2 2/3] clk: bcm2835: Support for clock parent selection

2015-11-11 Thread Remi Pommarel
Some bcm2835 clocks used by hardware (like "PWM" or "H264") can have multiple parent clocks. These clocks divide the rate of a parent which can be selected by setting the proper bits in the clock control register. Previously all these parents where handled by a mux clock. But a mux clock cannot be