Rao; Jean Delvare;
> Peter Korsgaard; linux-...@vger.kernel.org; Richard Röjfors; Steven A. Falco
> Subject: Re: [PATCH v2 2/3] i2c: xilinx: Set tx direction in write operation
>
> On 10/04/2013 03:38 PM, Lars-Peter Clausen wrote:
> > On 10/04/2013 03:09 PM, Michal Simek wrote:
> &g
On 10/04/2013 03:38 PM, Lars-Peter Clausen wrote:
> On 10/04/2013 03:09 PM, Michal Simek wrote:
>>
>>
>> On 10/04/2013 02:12 PM, Lars-Peter Clausen wrote:
>>> On 10/04/2013 01:55 PM, Wolfram Sang wrote:
On Fri, Oct 04, 2013 at 11:53:49AM +0200, Michal Simek wrote:
> On 10/04/2013 07:46 AM,
On 10/04/2013 03:09 PM, Michal Simek wrote:
>
>
> On 10/04/2013 02:12 PM, Lars-Peter Clausen wrote:
>> On 10/04/2013 01:55 PM, Wolfram Sang wrote:
>>> On Fri, Oct 04, 2013 at 11:53:49AM +0200, Michal Simek wrote:
On 10/04/2013 07:46 AM, Wolfram Sang wrote:
>
>> +cr = xiic_get
On 10/04/2013 02:12 PM, Lars-Peter Clausen wrote:
> On 10/04/2013 01:55 PM, Wolfram Sang wrote:
>> On Fri, Oct 04, 2013 at 11:53:49AM +0200, Michal Simek wrote:
>>> On 10/04/2013 07:46 AM, Wolfram Sang wrote:
> + cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
> + cr |= XIIC_CR_DIR_IS_T
On 10/04/2013 01:55 PM, Wolfram Sang wrote:
> On Fri, Oct 04, 2013 at 11:53:49AM +0200, Michal Simek wrote:
>> On 10/04/2013 07:46 AM, Wolfram Sang wrote:
>>>
+ cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
+ cr |= XIIC_CR_DIR_IS_TX_MASK;
+ xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr
On Fri, Oct 04, 2013 at 11:53:49AM +0200, Michal Simek wrote:
> On 10/04/2013 07:46 AM, Wolfram Sang wrote:
> >
> >> + cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
> >> + cr |= XIIC_CR_DIR_IS_TX_MASK;
> >> + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr);
> >> +
> >
> > Is there no need to clear t
On 10/04/2013 07:46 AM, Wolfram Sang wrote:
>
>> +cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
>> +cr |= XIIC_CR_DIR_IS_TX_MASK;
>> +xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr);
>> +
>
> Is there no need to clear the bit again when receiving?
This bit is cleared in xiic_xfer() -> xiic
> + cr = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
> + cr |= XIIC_CR_DIR_IS_TX_MASK;
> + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, cr);
> +
Is there no need to clear the bit again when receiving? And did
transferring ever work if this bit was never set before?
signature.asc
Description:
From: Kedareswara rao Appana
The patch fixes the problem with i2c eeprom memories
where controller is not properly setup to transmit mode.
This problem is fixed in write operation, after filling
address byte to tx fifo, set the direction of transfer
to tx using control register.
Signed-off-by:
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