Hi Christophe,
Boris Brezillon wrote on Wed, 7 Nov 2018
13:23:42 +0100:
> On Wed, 7 Nov 2018 12:08:58 +0100
> Christophe Kerello wrote:
>
> > >> +
> > >> +write_8bit:
> > >> +for (i = 0; i < len; i++)
> > >> +writeb_relaxed(p[i], io_addr_w);
> > >
> > > Is 8bit
Hi Christophe,
Boris Brezillon wrote on Wed, 7 Nov 2018
13:23:42 +0100:
> On Wed, 7 Nov 2018 12:08:58 +0100
> Christophe Kerello wrote:
>
> > >> +
> > >> +write_8bit:
> > >> +for (i = 0; i < len; i++)
> > >> +writeb_relaxed(p[i], io_addr_w);
> > >
> > > Is 8bit
On Wed, 7 Nov 2018 12:08:58 +0100
Christophe Kerello wrote:
> >> +
> >> +write_8bit:
> >> + for (i = 0; i < len; i++)
> >> + writeb_relaxed(p[i], io_addr_w);
> >
> > Is 8bit access really enforced by the byte accessor? In this case, how
> > can you be sure 32-bit accesses are doing
On Wed, 7 Nov 2018 12:08:58 +0100
Christophe Kerello wrote:
> >> +
> >> +write_8bit:
> >> + for (i = 0; i < len; i++)
> >> + writeb_relaxed(p[i], io_addr_w);
> >
> > Is 8bit access really enforced by the byte accessor? In this case, how
> > can you be sure 32-bit accesses are doing
Hi Boris,
On 11/5/18 5:39 PM, Boris Brezillon wrote:
Hi Christophe,
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
A few more comments.
+/* Sequencer read/write configuration */
+static void stm32_fmc2_rw_page_init(struct nand_chip *chip, int page,
+ int raw,
Hi Boris,
On 11/5/18 5:39 PM, Boris Brezillon wrote:
Hi Christophe,
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
A few more comments.
+/* Sequencer read/write configuration */
+static void stm32_fmc2_rw_page_init(struct nand_chip *chip, int page,
+ int raw,
Hi Christophe,
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
A few more comments.
> +/* Sequencer read/write configuration */
> +static void stm32_fmc2_rw_page_init(struct nand_chip *chip, int page,
> + int raw, bool write_data)
> +{
> + struct stm32_fmc2 *fmc2 =
Hi Christophe,
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
A few more comments.
> +/* Sequencer read/write configuration */
> +static void stm32_fmc2_rw_page_init(struct nand_chip *chip, int page,
> + int raw, bool write_data)
> +{
> + struct stm32_fmc2 *fmc2 =
On 10/05/2018 11:58 AM, Boris Brezillon wrote:
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
+struct stm32_fmc2 {
You should inherit from nand_controller even if the nand_chip already
embeds a dummy nand controller object.
struct nand_controller base;
Hi Boris,
Ok, i will add and
On 10/05/2018 11:58 AM, Boris Brezillon wrote:
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
+struct stm32_fmc2 {
You should inherit from nand_controller even if the nand_chip already
embeds a dummy nand controller object.
struct nand_controller base;
Hi Boris,
Ok, i will add and
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
> +struct stm32_fmc2 {
You should inherit from nand_controller even if the nand_chip already
embeds a dummy nand controller object.
struct nand_controller base;
> + struct stm32_fmc2_nand nand;
> + struct device *dev;
> + void
On Fri, 5 Oct 2018 11:41:59 +0200
wrote:
> +struct stm32_fmc2 {
You should inherit from nand_controller even if the nand_chip already
embeds a dummy nand controller object.
struct nand_controller base;
> + struct stm32_fmc2_nand nand;
> + struct device *dev;
> + void
From: Christophe Kerello
The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.
This patch is based on FMC2 command sequencer.
The purpose of the command sequencer is to facilitate the programming
and the reading of NAND flash pages with the ECC and
From: Christophe Kerello
The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.
This patch is based on FMC2 command sequencer.
The purpose of the command sequencer is to facilitate the programming
and the reading of NAND flash pages with the ECC and
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