On 9/19/2019 5:42 PM, James Morse wrote:
Hi guys,
On 12/09/2019 10:19, Shenhar, Talel wrote:
On 9/12/2019 11:50 AM, Marc Zyngier wrote:
On Thu, 12 Sep 2019 07:50:03 +0100,
"Shenhar, Talel" wrote:
On 9/11/2019 5:15 PM, Marc Zyngier wrote:
On Tue, 10 Sep 2019 20:05:09 +0100,
Talel Shenhar
Hi guys,
On 12/09/2019 10:19, Shenhar, Talel wrote:
> On 9/12/2019 11:50 AM, Marc Zyngier wrote:
>> On Thu, 12 Sep 2019 07:50:03 +0100,
>> "Shenhar, Talel" wrote:
>>> On 9/11/2019 5:15 PM, Marc Zyngier wrote:
On Tue, 10 Sep 2019 20:05:09 +0100,
Talel Shenhar wrote:
> + if (!FIEL
On 9/12/2019 11:50 AM, Marc Zyngier wrote:
On Thu, 12 Sep 2019 07:50:03 +0100,
"Shenhar, Talel" wrote:
Hi Marc,
On 9/11/2019 5:15 PM, Marc Zyngier wrote:
[+James]
Hi Talel,
On Tue, 10 Sep 2019 20:05:09 +0100,
Talel Shenhar wrote:
+ log1 = readl(pos->mmio_base + AL_POS_ERROR_LOG_
On Thu, 12 Sep 2019 07:50:03 +0100,
"Shenhar, Talel" wrote:
>
> Hi Marc,
>
>
> On 9/11/2019 5:15 PM, Marc Zyngier wrote:
> > [+James]
> >
> > Hi Talel,
> >
> > On Tue, 10 Sep 2019 20:05:09 +0100,
> > Talel Shenhar wrote:
> >
> >> + log1 = readl(pos->mmio_base + AL_POS_ERROR_LOG_1);
> > Do
Hi Marc,
On 9/11/2019 5:15 PM, Marc Zyngier wrote:
[+James]
Hi Talel,
On Tue, 10 Sep 2019 20:05:09 +0100,
Talel Shenhar wrote:
+ log1 = readl(pos->mmio_base + AL_POS_ERROR_LOG_1);
Do you actually need the implied barriers? I'd expect that relaxed
accesses should be enough.
You are
[+James]
Hi Talel,
On Tue, 10 Sep 2019 20:05:09 +0100,
Talel Shenhar wrote:
>
> The Amazon's Annapurna Labs SoCs includes Point Of Serialization error
> logging unit that reports an error in case write error (e.g. attempt to
> write to a read only register).
> This patch introduces the support
The Amazon's Annapurna Labs SoCs includes Point Of Serialization error
logging unit that reports an error in case write error (e.g. attempt to
write to a read only register).
This patch introduces the support for this unit.
Signed-off-by: Talel Shenhar
---
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