On Wed, 12 Oct 2016, Dave Hansen wrote:
> On 10/12/2016 06:34 AM, Thomas Gleixner wrote:
> >> > +if (c->x86 == 6 &&
> >> > +c->x86_model == INTEL_FAM6_XEON_PHI_KNL &&
> >> > +phir3mwait) {
> >> > +u64 prev;
> >> > +
> >> > +rdmsrl(MSR
On 10/12/2016 05:16 AM, Grzegorz Andrejczuk wrote:
> @@ -211,6 +219,25 @@ static void early_init_intel(struct cpuinfo_x86 *c)
> }
>
> check_mpx_erratum(c);
> +
> + /*
> + * Setting ring 3 MONITOR/MWAIT for all threads
> + * when CPU is Xeon Phi Family x200
> + * This c
On 10/12/2016 06:34 AM, Thomas Gleixner wrote:
>> > + if (c->x86 == 6 &&
>> > + c->x86_model == INTEL_FAM6_XEON_PHI_KNL &&
>> > + phir3mwait) {
>> > + u64 prev;
>> > +
>> > + rdmsrl(MSR_PHI_MISC_THD_FEATURE, prev);
>> > + if ((prev & MSR_PHI_MISC_THD_FEATURE_R3
On 10/12/2016 06:35 AM, Thomas Gleixner wrote:
> On Wed, 12 Oct 2016, Grzegorz Andrejczuk wrote:
>> > + /*
>> > + * Setting ring 3 MONITOR/MWAIT for all threads
>> > + * when CPU is Xeon Phi Family x200
>> > + * This can be disabled with phir3mwait=disable cmdline switch.
>> > + * We preserve
On Wed, 12 Oct 2016, Grzegorz Andrejczuk wrote:
>
> +static int phir3mwait = 1;
> +static int __init phir3mwait_disable(char *value)
Can someone @Intel please tell everyone to stop this annoying habit of
glueing variable declarations without a newline to the function? And the
variable should be
On Wed, 12 Oct 2016, Grzegorz Andrejczuk wrote:
> + /*
> + * Setting ring 3 MONITOR/MWAIT for all threads
> + * when CPU is Xeon Phi Family x200
> + * This can be disabled with phir3mwait=disable cmdline switch.
> + * We preserve the reserved values and set only 2nd bit.
> +
If processor is Intel Xeon Phi we enable user-level mwait feature.
Enabling this feature suppreses invalid-opcode error, when MONITOR/MWAIT
is called from ring 3.
Change-Id: I1c7defb99296b022790a068a6c725b3e860cd68c
Signed-off-by: Grzegorz Andrejczuk
---
arch/x86/kernel/cpu/intel.c | 27
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