Re: [PATCH v2 2/4] KVM: LAPIC: Keep timer running when switching between one-shot and periodic mode

2017-10-04 21:33 GMT+08:00 Radim Krčmář : > 2017-10-04 09:46+0800, Wanpeng Li: >> 2017-10-04 1:06 GMT+08:00 Radim Krčmář : >> > 2017-09-28 18:04-0700, Wanpeng Li: >> >> From: Wanpeng Li >> >> >> >> If we take TSC-deadline mode timer out of the picture, the Intel SDM >> >> does not say that the tim

Re: [PATCH v2 2/4] KVM: LAPIC: Keep timer running when switching between one-shot and periodic mode

2017-10-04 09:46+0800, Wanpeng Li: > 2017-10-04 1:06 GMT+08:00 Radim Krčmář : > > 2017-09-28 18:04-0700, Wanpeng Li: > >> From: Wanpeng Li > >> > >> If we take TSC-deadline mode timer out of the picture, the Intel SDM > >> does not say that the timer is disable when the timer mode is change, > >>

Re: [PATCH v2 2/4] KVM: LAPIC: Keep timer running when switching between one-shot and periodic mode

2017-10-04 1:06 GMT+08:00 Radim Krčmář : > 2017-09-28 18:04-0700, Wanpeng Li: >> From: Wanpeng Li >> >> If we take TSC-deadline mode timer out of the picture, the Intel SDM >> does not say that the timer is disable when the timer mode is change, >> either from one-shot to periodic or vice versa. >

Re: [PATCH v2 2/4] KVM: LAPIC: Keep timer running when switching between one-shot and periodic mode

2017-09-28 18:04-0700, Wanpeng Li: > From: Wanpeng Li > > If we take TSC-deadline mode timer out of the picture, the Intel SDM > does not say that the timer is disable when the timer mode is change, > either from one-shot to periodic or vice versa. I think it does, please see comment under [v2 1

[PATCH v2 2/4] KVM: LAPIC: Keep timer running when switching between one-shot and periodic mode

From: Wanpeng Li If we take TSC-deadline mode timer out of the picture, the Intel SDM does not say that the timer is disable when the timer mode is change, either from one-shot to periodic or vice versa. After this patch, the timer is no longer disarmed on change of mode, so the counter (TMCCT)