On 09/21, Joel Stanley wrote:
> @@ -112,9 +115,137 @@ static const struct aspeed_gate_data aspeed_gates[]
> __initconst = {
> /* 31: reserved */
> };
>
> +static const struct clk_div_table ast2400_div_table[] = {
> + { 0x0, 2 },
> + { 0x1, 4 },
> + { 0x2, 6 },
> + { 0x3, 8
On Mon, Sep 25, 2017 at 10:02 PM, Andrew Jeffery wrote:
>> +static const struct clk_div_table ast2400_div_table[] = {
>> + { 0x0, 2 },
>> + { 0x1, 4 },
>> + { 0x2, 6 },
>> + { 0x3, 8 },
>> + { 0x4, 10 },
>> + { 0x5, 12 },
>> + { 0x6, 14 },
>> + { 0x7, 16 },
>> +
On Thu, 2017-09-21 at 13:56 +0930, Joel Stanley wrote:
> This registers the core clocks; those which are required to calculate
> the rate of the timer periperhal so the system can load a clocksource
> driver.
>
> Signed-off-by: Joel Stanley
> ---
> drivers/clk/clk-aspeed.c | 152
> +
This registers the core clocks; those which are required to calculate
the rate of the timer periperhal so the system can load a clocksource
driver.
Signed-off-by: Joel Stanley
---
drivers/clk/clk-aspeed.c | 152 ++-
1 file changed, 149 insertions(+), 3
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