On Tue, 2018-01-23 at 17:28 -0800, Dave Hansen wrote:
> On 01/23/2018 05:23 PM, Woodhouse, David wrote:
> >
> > On Tue, 2018-01-23 at 10:43 -0800, Dave Hansen wrote:
> ...
> >
> > >
> > > >
> > > > /* Intel-defined CPU features, CPUID level 0x0007:0 (EDX), word
> > > > 18 */
> > > > #d
On 01/23/2018 05:23 PM, Woodhouse, David wrote:
> On Tue, 2018-01-23 at 10:43 -0800, Dave Hansen wrote:
...
>>> /* Intel-defined CPU features, CPUID level 0x0007:0 (EDX), word 18 */
>>> #define X86_FEATURE_AVX512_4VNNIW(18*32+ 2) /* AVX-512 Neural Network
>>> Instructions */
>>> #def
On 01/23/2018 08:52 AM, David Woodhouse wrote:
>
> diff --git a/arch/x86/include/asm/cpufeatures.h
> b/arch/x86/include/asm/cpufeatures.h
> index 7b25cf3..0a51070 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -320,6 +320,9 @@
> /* Intel-defined
Add three feature bits exposed by new microcode on Intel CPUs for
speculation control.
Signed-off-by: David Woodhouse
Reviewed-by: Borislav Petkov
---
arch/x86/include/asm/cpufeatures.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h
b/arch/x86/include
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