On 08/14/2012 01:52 PM, Catalin Marinas wrote:
> From: Marc Zyngier
>
> This patch adds support for the ARM generic timers with A64 instructions
> for accessing the timer registers. It uses the physical counter as the
> clock source and the virtual counter as sched_clock.
>
> The timer
On 08/14/2012 01:52 PM, Catalin Marinas wrote:
From: Marc Zyngier marc.zyng...@arm.com
This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as sched_clock.
The
On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
From: Marc Zyngier
This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as sched_clock.
The timer frequency
* Catalin Marinas [120814 11:00]:
> From: Marc Zyngier
>
> This patch adds support for the ARM generic timers with A64 instructions
> for accessing the timer registers. It uses the physical counter as the
> clock source and the virtual counter as sched_clock.
>
> The timer frequency can be
* Catalin Marinas catalin.mari...@arm.com [120814 11:00]:
From: Marc Zyngier marc.zyng...@arm.com
This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as
On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
From: Marc Zyngiermarc.zyng...@arm.com
This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as sched_clock.
On Tue, Aug 14, 2012 at 7:52 PM, Catalin Marinas
wrote:
> From: Marc Zyngier
(...)
> +static void __init arch_timer_calibrate(void)
I think you wrot in the last review thread that this should be renamed
"arch_timer_get_freq()".
> +{
> + if (arch_timer_rate == 0) {
> +
On Tue, Aug 14, 2012 at 7:52 PM, Catalin Marinas
catalin.mari...@arm.com wrote:
From: Marc Zyngier marc.zyng...@arm.com
(...)
+static void __init arch_timer_calibrate(void)
I think you wrot in the last review thread that this should be renamed
arch_timer_get_freq().
+{
+ if
On Tuesday 14 August 2012, Catalin Marinas wrote:
> +static void arch_timer_reg_write(int reg, u32 val)
> +{
> + switch (reg) {
> + case ARCH_TIMER_REG_CTRL:
> + asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
> + break;
> + case
On Tuesday 14 August 2012, Catalin Marinas wrote:
+static void arch_timer_reg_write(int reg, u32 val)
+{
+ switch (reg) {
+ case ARCH_TIMER_REG_CTRL:
+ asm volatile(msr cntp_ctl_el0, %0 : : r (val));
+ break;
+ case ARCH_TIMER_REG_TVAL:
+
From: Marc Zyngier
This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as sched_clock.
The timer frequency can be specified via DT or read from the CNTFRQ_EL0
From: Marc Zyngier marc.zyng...@arm.com
This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as sched_clock.
The timer frequency can be specified via DT or read from
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