Re: [PATCH v2 3/3] ARM: dts: berlin: correct BG2Q's SM GPIO location.

2015-01-07 Thread Sebastian Hesselbarth
On 26.12.2014 09:58, Jisheng Zhang wrote: The gpio4 and gpio5 are in 0xf7fc apb which is located in the SM domain. This patch moves gpio4 and gpio5 to the correct location. This patch also renames them as the following to match the names we internally used in marvell: gpio4 -> sm_gpio

[PATCH v2 3/3] ARM: dts: berlin: correct BG2Q's SM GPIO location.

2014-12-26 Thread Jisheng Zhang
The gpio4 and gpio5 are in 0xf7fc apb which is located in the SM domain. This patch moves gpio4 and gpio5 to the correct location. This patch also renames them as the following to match the names we internally used in marvell: gpio4 -> sm_gpio1 gpio5 -> sm_gpio0 porte ->