Re: [PATCH v2 3/4] spi: spi-fsl-dspi: Fix cmd_fifo is written before tx_fifo

2018-09-30 Thread Esben Haabendal
Chuanhua Han writes: > This patch fixes the problem of invalid data writing during the XSPI > mode transfer of the dspi controller. > In XSPI mode,When I executed TX FIFO first and then CMD FIFO for XSPI > transmission, I found that SPIx_SR[TFIWF]=1(Invalid Data present in TX > FIFO since CMD

Re: [PATCH v2 3/4] spi: spi-fsl-dspi: Fix cmd_fifo is written before tx_fifo

2018-09-30 Thread Esben Haabendal
Chuanhua Han writes: > This patch fixes the problem of invalid data writing during the XSPI > mode transfer of the dspi controller. > In XSPI mode,When I executed TX FIFO first and then CMD FIFO for XSPI > transmission, I found that SPIx_SR[TFIWF]=1(Invalid Data present in TX > FIFO since CMD

[PATCH v2 3/4] spi: spi-fsl-dspi: Fix cmd_fifo is written before tx_fifo

2018-09-30 Thread Chuanhua Han
This patch fixes the problem of invalid data writing during the XSPI mode transfer of the dspi controller. In XSPI mode,When I executed TX FIFO first and then CMD FIFO for XSPI transmission, I found that SPIx_SR[TFIWF]=1(Invalid Data present in TX FIFO since CMD FIFO is empty). This is the time

[PATCH v2 3/4] spi: spi-fsl-dspi: Fix cmd_fifo is written before tx_fifo

2018-09-30 Thread Chuanhua Han
This patch fixes the problem of invalid data writing during the XSPI mode transfer of the dspi controller. In XSPI mode,When I executed TX FIFO first and then CMD FIFO for XSPI transmission, I found that SPIx_SR[TFIWF]=1(Invalid Data present in TX FIFO since CMD FIFO is empty). This is the time