Re: [PATCH v2 3/5] fpga manager: xilinx-spi: rework write_complete loop implementation

2020-08-28 Thread Tom Rix
On 8/27/20 11:38 PM, Luca Ceresoli wrote: > Hi Tom, > > On 27/08/20 21:34, Tom Rix wrote: >> On 8/27/20 12:26 PM, Luca Ceresoli wrote: >>> Hi Tom, >>> >>> thanks for the prompt feedback! >>> >>> On 27/08/20 20:59, Tom Rix wrote: On 8/27/20 7:32 AM, Luca Ceresoli wrote: > In preparation t

Re: [PATCH v2 3/5] fpga manager: xilinx-spi: rework write_complete loop implementation

2020-08-27 Thread Luca Ceresoli
Hi Tom, On 27/08/20 21:34, Tom Rix wrote: > > On 8/27/20 12:26 PM, Luca Ceresoli wrote: >> Hi Tom, >> >> thanks for the prompt feedback! >> >> On 27/08/20 20:59, Tom Rix wrote: >>> On 8/27/20 7:32 AM, Luca Ceresoli wrote: In preparation to add error checking for gpiod_get_value(), rework >>>

Re: [PATCH v2 3/5] fpga manager: xilinx-spi: rework write_complete loop implementation

2020-08-27 Thread Luca Ceresoli
Hi Tom, thanks for the prompt feedback! On 27/08/20 20:59, Tom Rix wrote: > > On 8/27/20 7:32 AM, Luca Ceresoli wrote: >> In preparation to add error checking for gpiod_get_value(), rework >> the loop to avoid the duplication of these lines: >> >> if (gpiod_get_value(conf->done)) >>

Re: [PATCH v2 3/5] fpga manager: xilinx-spi: rework write_complete loop implementation

2020-08-27 Thread Tom Rix
On 8/27/20 7:32 AM, Luca Ceresoli wrote: > In preparation to add error checking for gpiod_get_value(), rework > the loop to avoid the duplication of these lines: > > if (gpiod_get_value(conf->done)) > return xilinx_spi_apply_cclk_cycles(conf); > > There is little advantage in

[PATCH v2 3/5] fpga manager: xilinx-spi: rework write_complete loop implementation

2020-08-27 Thread Luca Ceresoli
In preparation to add error checking for gpiod_get_value(), rework the loop to avoid the duplication of these lines: if (gpiod_get_value(conf->done)) return xilinx_spi_apply_cclk_cycles(conf); There is little advantage in this rework with current code. However error checki