Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)

2016-11-21 Thread Andrew Jeffery
On Fri, 2016-11-18 at 18:45 +, Lee Jones wrote: > [Sending Arnd this time!] > > > Arnd, > > > > Do you have a preference? > > > > > The Aspeed LPC Host Controller is presented as a syscon device to > > > arbitrate access by LPC and pinmux drivers. LPC pinmux configuration on > > > fifth gene

Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)

2016-11-18 Thread Lee Jones
Arnd, Do you have a preference? > The Aspeed LPC Host Controller is presented as a syscon device to > arbitrate access by LPC and pinmux drivers. LPC pinmux configuration on > fifth generation SoCs depends on bits in both the System Control Unit > and the LPC Host Controller. > > Signed-off-by:

Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)

2016-11-18 Thread Lee Jones
[Sending Arnd this time!] > Arnd, > > Do you have a preference? > > > The Aspeed LPC Host Controller is presented as a syscon device to > > arbitrate access by LPC and pinmux drivers. LPC pinmux configuration on > > fifth generation SoCs depends on bits in both the System Control Unit > > and th

Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)

2016-11-03 Thread Andrew Jeffery
On Fri, 2016-11-04 at 09:36 +1030, Joel Stanley wrote: > On Thu, Nov 3, 2016 at 1:07 AM, Andrew Jeffery wrote: > > > > The Aspeed LPC Host Controller is presented as a syscon device to > > arbitrate access by LPC and pinmux drivers. LPC pinmux configuration on > > fifth generation SoCs depends on

Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)

2016-11-03 Thread Joel Stanley
On Thu, Nov 3, 2016 at 1:07 AM, Andrew Jeffery wrote: > The Aspeed LPC Host Controller is presented as a syscon device to > arbitrate access by LPC and pinmux drivers. LPC pinmux configuration on > fifth generation SoCs depends on bits in both the System Control Unit > and the LPC Host Controller.

[PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)

2016-11-02 Thread Andrew Jeffery
The Aspeed LPC Host Controller is presented as a syscon device to arbitrate access by LPC and pinmux drivers. LPC pinmux configuration on fifth generation SoCs depends on bits in both the System Control Unit and the LPC Host Controller. Signed-off-by: Andrew Jeffery --- Documentation/devicetree/