On Mon, 13 Jul 2015, Eric Anholt wrote:
> +static void
> +bcm2836_arm_irqchip_smp_init(void)
> +{
> +#ifdef CONFIG_SMP
> + int i;
> +
> + /* unmask IPIs */
> + for_each_possible_cpu(i) {
> + bcm2836_arm_irqchip_unmask_per_cpu_irq(
> + LOCAL_MAILBOX_INT_CO
Stephen Warren writes:
> On 07/13/2015 07:35 PM, Eric Anholt wrote:
>> This interrupt controller is the new root interrupt controller with
>> the timer, PMU events, and IPIs, and the bcm2835's interrupt
>> controller is chained off of it to handle the peripherals.
>
>> diff --git a/drivers/irqchi
On 07/13/2015 07:35 PM, Eric Anholt wrote:
> This interrupt controller is the new root interrupt controller with
> the timer, PMU events, and IPIs, and the bcm2835's interrupt
> controller is chained off of it to handle the peripherals.
> diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchi
This interrupt controller is the new root interrupt controller with
the timer, PMU events, and IPIs, and the bcm2835's interrupt
controller is chained off of it to handle the peripherals.
I wrote the interrupt chip support, while Andrea Merello wrote the IPI
code.
Signed-off-by: Eric Anholt
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