Set the register REG_ENCR_XTS_DU_SIZE to cryptlen for AES XTS
transformation. Anything else causes the engine to return back
wrong results.

Signed-off-by: Thara Gopinath <thara.gopin...@linaro.org>
---
 drivers/crypto/qce/common.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
index a73db2a5637f..f7bc701a4aa2 100644
--- a/drivers/crypto/qce/common.c
+++ b/drivers/crypto/qce/common.c
@@ -295,15 +295,15 @@ static void qce_xtskey(struct qce_device *qce, const u8 
*enckey,
 {
        u32 xtskey[QCE_MAX_CIPHER_KEY_SIZE / sizeof(u32)] = {0};
        unsigned int xtsklen = enckeylen / (2 * sizeof(u32));
-       unsigned int xtsdusize;
 
        qce_cpu_to_be32p_array((__be32 *)xtskey, enckey + enckeylen / 2,
                               enckeylen / 2);
        qce_write_array(qce, REG_ENCR_XTS_KEY0, xtskey, xtsklen);
 
-       /* xts du size 512B */
-       xtsdusize = min_t(u32, QCE_SECTOR_SIZE, cryptlen);
-       qce_write(qce, REG_ENCR_XTS_DU_SIZE, xtsdusize);
+       /* Set data unit size to cryptlen. Anything else causes
+        * crypto engine to return back incorrect results.
+        */
+       qce_write(qce, REG_ENCR_XTS_DU_SIZE, cryptlen);
 }
 
 static int qce_setup_regs_skcipher(struct crypto_async_request *async_req,
-- 
2.25.1

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