Re: [PATCH v3] arm64: Add support for PTE contiguous bit.

On 11/20/2015 05:07 AM, yalin wang wrote: + +void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, pte_t pte) +{ + size_t pgsize; + int i; + int ncontig = find_num_contig(mm, addr, ptep, pte, ); + unsigned long pfn; +

Re: [PATCH v3] arm64: Add support for PTE contiguous bit.

> On Nov 20, 2015, at 00:57, David Woods wrote: > > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The set of huge page

Re: [PATCH v3] arm64: Add support for PTE contiguous bit.

> On Nov 20, 2015, at 00:57, David Woods wrote: > > The arm64 MMU supports a Contiguous bit which is a hint that the TTE > is one of a set of contiguous entries which can be cached in a single > TLB entry. Supporting this bit adds new intermediate huge page sizes. > > The

Re: [PATCH v3] arm64: Add support for PTE contiguous bit.

On 11/20/2015 05:07 AM, yalin wang wrote: + +void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, pte_t pte) +{ + size_t pgsize; + int i; + int ncontig = find_num_contig(mm, addr, ptep, pte, ); + unsigned long pfn; +

[PATCH v3] arm64: Add support for PTE contiguous bit.

The arm64 MMU supports a Contiguous bit which is a hint that the TTE is one of a set of contiguous entries which can be cached in a single TLB entry. Supporting this bit adds new intermediate huge page sizes. The set of huge page sizes available depends on the base page size. Without using

[PATCH v3] arm64: Add support for PTE contiguous bit.

The arm64 MMU supports a Contiguous bit which is a hint that the TTE is one of a set of contiguous entries which can be cached in a single TLB entry. Supporting this bit adds new intermediate huge page sizes. The set of huge page sizes available depends on the base page size. Without using