On Wed, Feb 1, 2017 at 2:20 AM, Andrew Jeffery wrote:
> On Wed, 2017-02-01 at 11:22 +1030, Andrew Jeffery wrote:
>> On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
>> > > > > > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery
>> > > > > > wrote:
>> > >
On Wed, Feb 1, 2017 at 2:20 AM, Andrew Jeffery wrote:
> On Wed, 2017-02-01 at 11:22 +1030, Andrew Jeffery wrote:
>> On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
>> > > > > > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery
>> > > > > > wrote:
>> > > This is less straight-forward than
On Wed, 2017-02-01 at 11:22 +1030, Andrew Jeffery wrote:
> On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
> > > > > > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery
> > > > > > wrote:
> > > This is less straight-forward than one would hope, as some banks only
> > >
On Wed, 2017-02-01 at 11:22 +1030, Andrew Jeffery wrote:
> On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
> > > > > > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery
> > > > > > wrote:
> > > This is less straight-forward than one would hope, as some banks only
> > > have 4 pins rather
On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
> > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery wrote:
>
> > This is less straight-forward than one would hope, as some banks only
> > have 4 pins rather than 8, others are output only, yet more (W and
> > X, already
On Tue, 2017-01-31 at 15:50 +0100, Linus Walleij wrote:
> > On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery wrote:
>
> > This is less straight-forward than one would hope, as some banks only
> > have 4 pins rather than 8, others are output only, yet more (W and
> > X, already supported) are
On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery wrote:
> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC
On Fri, Jan 27, 2017 at 5:24 AM, Andrew Jeffery wrote:
> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC doesn't exist.
>
>
On Fri, Jan 27, 2017 at 3:24 PM, Andrew Jeffery wrote:
> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC
On Fri, Jan 27, 2017 at 3:24 PM, Andrew Jeffery wrote:
> This is less straight-forward than one would hope, as some banks only
> have 4 pins rather than 8, others are output only, yet more (W and
> X, already supported) are input-only, and in the case of the g4 SoC bank
> AC doesn't exist.
>
>
This is less straight-forward than one would hope, as some banks only
have 4 pins rather than 8, others are output only, yet more (W and
X, already supported) are input-only, and in the case of the g4 SoC bank
AC doesn't exist.
Add some structs to describe the varying properties of different
This is less straight-forward than one would hope, as some banks only
have 4 pins rather than 8, others are output only, yet more (W and
X, already supported) are input-only, and in the case of the g4 SoC bank
AC doesn't exist.
Add some structs to describe the varying properties of different
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