Re: [PATCH v3 0/3] perf/sdt: Hardening argument support

2017-03-31 Thread Ravi Bangoria
On Tuesday 28 March 2017 09:10 PM, Arnaldo Carvalho de Melo wrote: > Em Wed, Mar 29, 2017 at 12:29:29AM +0900, Masami Hiramatsu escreveu: >> Hi Arnaldo, >> >> please pull this, I've already acked to this series. > I did it 15 minutes ago, running build tests on it now. Hi Arnaldo, Thanks for pu

Re: [PATCH v3 0/3] perf/sdt: Hardening argument support

2017-03-28 Thread Arnaldo Carvalho de Melo
Em Wed, Mar 29, 2017 at 12:29:29AM +0900, Masami Hiramatsu escreveu: > Hi Arnaldo, > > please pull this, I've already acked to this series. I did it 15 minutes ago, running build tests on it now. - Arnaldo > Thank you, > > On Tue, 28 Mar 2017 15:17:51 +0530 > Ravi Bangoria wrote: > > > SDT

Re: [PATCH v3 0/3] perf/sdt: Hardening argument support

2017-03-28 Thread Masami Hiramatsu
Hi Arnaldo, please pull this, I've already acked to this series. Thank you, On Tue, 28 Mar 2017 15:17:51 +0530 Ravi Bangoria wrote: > SDT event argument support on x86 is recently added to Perf. But > there are couple of issues with it. > > It lacks renaming mapping for few 8 bit registers:

[PATCH v3 0/3] perf/sdt: Hardening argument support

2017-03-28 Thread Ravi Bangoria
SDT event argument support on x86 is recently added to Perf. But there are couple of issues with it. It lacks renaming mapping for few 8 bit registers: al, bl, cl, dl, ah, bh, ch and dh. SDT events using these registers in arguments are failing at 'perf probe'. Add renaming logic to them. (patch 1