On Tue, 27 Oct 2020 at 13:06, Marc Zyngier wrote:
>
> On 2020-10-27 11:21, Vincent Guittot wrote:
> > On Tue, 27 Oct 2020 at 11:50, Vincent Guittot
> > wrote:
> >>
> >> On Tue, 27 Oct 2020 at 11:37, Marc Zyngier wrote:
> >> >
> >> > On 2020-10-27 10:12, Vincent Guittot wrote:
> >> > > HI Marc,
On 2020-10-27 11:21, Vincent Guittot wrote:
On Tue, 27 Oct 2020 at 11:50, Vincent Guittot
wrote:
On Tue, 27 Oct 2020 at 11:37, Marc Zyngier wrote:
>
> On 2020-10-27 10:12, Vincent Guittot wrote:
> > HI Marc,
> >
> > On Mon, 19 Oct 2020 at 17:43, Vincent Guittot
> > wrote:
> >>
> >> On Mon,
On Tue, 27 Oct 2020 at 11:50, Vincent Guittot
wrote:
>
> On Tue, 27 Oct 2020 at 11:37, Marc Zyngier wrote:
> >
> > On 2020-10-27 10:12, Vincent Guittot wrote:
> > > HI Marc,
> > >
> > > On Mon, 19 Oct 2020 at 17:43, Vincent Guittot
> > > wrote:
> > >>
> > >> On Mon, 19 Oct 2020 at 15:04, Marc
On Tue, 27 Oct 2020 at 11:37, Marc Zyngier wrote:
>
> On 2020-10-27 10:12, Vincent Guittot wrote:
> > HI Marc,
> >
> > On Mon, 19 Oct 2020 at 17:43, Vincent Guittot
> > wrote:
> >>
> >> On Mon, 19 Oct 2020 at 15:04, Marc Zyngier wrote:
> >> >
> >
> > ...
> >
> >> > >>
> >> > >> One of the major
On 2020-10-27 10:12, Vincent Guittot wrote:
HI Marc,
On Mon, 19 Oct 2020 at 17:43, Vincent Guittot
wrote:
On Mon, 19 Oct 2020 at 15:04, Marc Zyngier wrote:
>
...
> >>
> >> One of the major difference is that we end up, in some cases
> >> (such as when performing IRQ time accounting on
HI Marc,
On Mon, 19 Oct 2020 at 17:43, Vincent Guittot
wrote:
>
> On Mon, 19 Oct 2020 at 15:04, Marc Zyngier wrote:
> >
...
> > >>
> > >> One of the major difference is that we end up, in some cases
> > >> (such as when performing IRQ time accounting on the scheduler
> > >> IPI), end up with
Hi,
On 19/10/20 16:43, Vincent Guittot wrote:
> On Mon, 19 Oct 2020 at 15:04, Marc Zyngier wrote:
>> Since you are running perf, can you spot where the overhead occurs?
>
> hmm... Difficult to say because tracing the bench decreases a lot the
> result. I have pasted the perf reports.
>
> I
On Mon, 19 Oct 2020 at 15:04, Marc Zyngier wrote:
>
> Hi Vincent,
>
> On 2020-10-19 13:42, Vincent Guittot wrote:
> > Hi Marc,
> >
> > On Tue, 1 Sep 2020 at 16:44, Marc Zyngier wrote:
> >>
> >> In order to deal with IPIs as normal interrupts, let's add
> >> a new way to register them with the
Hi Vincent,
On 2020-10-19 13:42, Vincent Guittot wrote:
Hi Marc,
On Tue, 1 Sep 2020 at 16:44, Marc Zyngier wrote:
In order to deal with IPIs as normal interrupts, let's add
a new way to register them with the architecture code.
set_smp_ipi_range() takes a range of interrupts, and allows
Hi Marc,
On Tue, 1 Sep 2020 at 16:44, Marc Zyngier wrote:
>
> In order to deal with IPIs as normal interrupts, let's add
> a new way to register them with the architecture code.
>
> set_smp_ipi_range() takes a range of interrupts, and allows
> the arch code to request them as if the were normal
On Tue, Sep 01, 2020 at 03:43:11PM +0100, Marc Zyngier wrote:
> In order to deal with IPIs as normal interrupts, let's add
> a new way to register them with the architecture code.
>
> set_smp_ipi_range() takes a range of interrupts, and allows
> the arch code to request them as if the were normal
In order to deal with IPIs as normal interrupts, let's add
a new way to register them with the architecture code.
set_smp_ipi_range() takes a range of interrupts, and allows
the arch code to request them as if the were normal interrupts.
A standard handler is then called by the core IRQ code to
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