Am 03.03.2017 um 07:20 schrieb Rob Herring:
> On Tue, Feb 28, 2017 at 12:39:08PM +, Mark Rutland wrote:
>> On Tue, Feb 28, 2017 at 07:35:13AM +0100, Andreas Färber wrote:
>>> The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
>>> 32-bit timers. The S900 SoC timer block has
Am 03.03.2017 um 07:20 schrieb Rob Herring:
> On Tue, Feb 28, 2017 at 12:39:08PM +, Mark Rutland wrote:
>> On Tue, Feb 28, 2017 at 07:35:13AM +0100, Andreas Färber wrote:
>>> The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
>>> 32-bit timers. The S900 SoC timer block has
On Tue, Feb 28, 2017 at 12:39:08PM +, Mark Rutland wrote:
> On Tue, Feb 28, 2017 at 07:35:13AM +0100, Andreas Färber wrote:
> > The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
> > 32-bit timers. The S900 SoC timer block has four 32-bit timers.
> >
> > Signed-off-by:
On Tue, Feb 28, 2017 at 12:39:08PM +, Mark Rutland wrote:
> On Tue, Feb 28, 2017 at 07:35:13AM +0100, Andreas Färber wrote:
> > The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
> > 32-bit timers. The S900 SoC timer block has four 32-bit timers.
> >
> > Signed-off-by:
On Tue, Feb 28, 2017 at 07:35:13AM +0100, Andreas Färber wrote:
> The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
> 32-bit timers. The S900 SoC timer block has four 32-bit timers.
>
> Signed-off-by: Andreas Färber
> ---
> v2 -> v3:
> * Adopted
On Tue, Feb 28, 2017 at 07:35:13AM +0100, Andreas Färber wrote:
> The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
> 32-bit timers. The S900 SoC timer block has four 32-bit timers.
>
> Signed-off-by: Andreas Färber
> ---
> v2 -> v3:
> * Adopted interrupt-names
> *
The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
32-bit timers. The S900 SoC timer block has four 32-bit timers.
Signed-off-by: Andreas Färber
---
v2 -> v3:
* Adopted interrupt-names
* Changed compatible for S500
* Added S900 compatible and interrupt
The Actions Semi S500 SoC contains a timer block with two 2 Hz and two
32-bit timers. The S900 SoC timer block has four 32-bit timers.
Signed-off-by: Andreas Färber
---
v2 -> v3:
* Adopted interrupt-names
* Changed compatible for S500
* Added S900 compatible and interrupt names
v2: new
8 matches
Mail list logo