Re: [PATCH v3 05/15] phy: tegra: xusb: Rearrange UPHY init on Tegra210

2020-09-28 Thread Thierry Reding
On Wed, Sep 09, 2020 at 04:10:31PM +0800, JC Kuo wrote: > This commit is a preparation for enabling XUSB SC7 support. > It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence, > for the following reasons: > > 1. PLLE hardware power sequencer has to be enabled only after both >PEX UPHY

[PATCH v3 05/15] phy: tegra: xusb: Rearrange UPHY init on Tegra210

2020-09-09 Thread JC Kuo
This commit is a preparation for enabling XUSB SC7 support. It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence, for the following reasons: 1. PLLE hardware power sequencer has to be enabled only after both PEX UPHY PLL and SATA UPHY PLL are initialized. tegra210_uphy_init() -> t