On Thu, Feb 01, 2018 at 03:59:21PM -0600, Alan Tull wrote:
> On Tue, Dec 5, 2017 at 11:30 PM, Wu Hao wrote:
> > On Tue, Dec 05, 2017 at 11:00:22AM -0600, Alan Tull wrote:
> >> On Mon, Dec 4, 2017 at 9:33 PM, Wu Hao wrote:
> >> > On Mon, Dec 04, 2017 at 01:46:59PM -0600, Alan Tull wrote:
> >> >> O
On Tue, Dec 5, 2017 at 11:30 PM, Wu Hao wrote:
> On Tue, Dec 05, 2017 at 11:00:22AM -0600, Alan Tull wrote:
>> On Mon, Dec 4, 2017 at 9:33 PM, Wu Hao wrote:
>> > On Mon, Dec 04, 2017 at 01:46:59PM -0600, Alan Tull wrote:
>> >> On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao wrote:
>> >> > On Mon, Nov 27
On Wed, Dec 06, 2017 at 09:34:14AM +, David Laight wrote:
> From: Wu Hao
> > Sent: 05 December 2017 03:34
> ...
> > > I don't see anything Intel specific here. This could all be named dfl-*
> >
> > The maybe some device specific things, e.g Intel FPGA devices supported by
> > this
> > driver
On Wed, Dec 6, 2017 at 10:28 AM, David Laight wrote:
> From: Alan Tull
>> Sent: 06 December 2017 15:30
>> On Wed, Dec 6, 2017 at 3:44 AM, David Laight wrote:
>> > From: Wu Hao
>> >> Sent: 06 December 2017 05:30
>> > ...
>> >> > Regarding file names, it seems like the files added to drivers/fpga
>
From: Alan Tull
> Sent: 06 December 2017 15:30
> On Wed, Dec 6, 2017 at 3:44 AM, David Laight wrote:
> > From: Wu Hao
> >> Sent: 06 December 2017 05:30
> > ...
> >> > Regarding file names, it seems like the files added to drivers/fpga
> >> > could be uniformly named dfl-*.[ch]. Some are fpga-dfl-
On Wed, Dec 6, 2017 at 3:44 AM, David Laight wrote:
> From: Wu Hao
>> Sent: 06 December 2017 05:30
> ...
>> > Regarding file names, it seems like the files added to drivers/fpga
>> > could be uniformly named dfl-*.[ch]. Some are fpga-dfl-*.[ch] while
>> > other are currently dfl-*.[ch] currently.
From: Wu Hao
> Sent: 06 December 2017 05:30
...
> > Regarding file names, it seems like the files added to drivers/fpga
> > could be uniformly named dfl-*.[ch]. Some are fpga-dfl-*.[ch] while
> > other are currently dfl-*.[ch] currently.
They don't even want to do into a drivers/fgpa directory.
M
From: Wu Hao
> Sent: 05 December 2017 03:34
...
> > I don't see anything Intel specific here. This could all be named dfl-*
>
> The maybe some device specific things, e.g Intel FPGA devices supported by
> this
> driver always have FME DFL at the beginning on the BAR0 for PF device.
Since when h
From: Alan Tull
> Sent: 04 December 2017 19:47
>
> On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao wrote:
> > On Mon, Nov 27, 2017 at 10:28:04AM +, David Laight wrote:
> >> From: Wu Hao
> >> > Sent: 27 November 2017 06:42
> >> > From: Zhang Yi
> >> >
> >> > The Intel FPGA device appears as a PCIe de
On Tue, Dec 05, 2017 at 11:00:22AM -0600, Alan Tull wrote:
> On Mon, Dec 4, 2017 at 9:33 PM, Wu Hao wrote:
> > On Mon, Dec 04, 2017 at 01:46:59PM -0600, Alan Tull wrote:
> >> On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao wrote:
> >> > On Mon, Nov 27, 2017 at 10:28:04AM +, David Laight wrote:
> >> >
On Mon, Dec 4, 2017 at 9:33 PM, Wu Hao wrote:
> On Mon, Dec 04, 2017 at 01:46:59PM -0600, Alan Tull wrote:
>> On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao wrote:
>> > On Mon, Nov 27, 2017 at 10:28:04AM +, David Laight wrote:
>> >> From: Wu Hao
>> >> > Sent: 27 November 2017 06:42
>> >> > From: Zha
On Mon, Dec 04, 2017 at 01:46:59PM -0600, Alan Tull wrote:
> On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao wrote:
> > On Mon, Nov 27, 2017 at 10:28:04AM +, David Laight wrote:
> >> From: Wu Hao
> >> > Sent: 27 November 2017 06:42
> >> > From: Zhang Yi
> >> >
> >> > The Intel FPGA device appears as
On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao wrote:
> On Mon, Nov 27, 2017 at 10:28:04AM +, David Laight wrote:
>> From: Wu Hao
>> > Sent: 27 November 2017 06:42
>> > From: Zhang Yi
>> >
>> > The Intel FPGA device appears as a PCIe device on the system. This patch
>> > implements the basic framewo
On Mon, Nov 27, 2017 at 10:28:04AM +, David Laight wrote:
> From: Wu Hao
> > Sent: 27 November 2017 06:42
> > From: Zhang Yi
> >
> > The Intel FPGA device appears as a PCIe device on the system. This patch
> > implements the basic framework of the driver for Intel PCIe device which
> > is loc
From: Wu Hao
> Sent: 27 November 2017 06:42
> From: Zhang Yi
>
> The Intel FPGA device appears as a PCIe device on the system. This patch
> implements the basic framework of the driver for Intel PCIe device which
> is located between CPU and Accelerated Function Units (AFUs), and has
> the Device
From: Zhang Yi
The Intel FPGA device appears as a PCIe device on the system. This patch
implements the basic framework of the driver for Intel PCIe device which
is located between CPU and Accelerated Function Units (AFUs), and has
the Device Feature List (DFL) implemented in its MMIO space.
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