Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence

On Wed, 2016-09-07 at 15:53 +0100, Bryan O'Donoghue wrote: > On Wed, 2016-09-07 at 15:39 +0300, Andy Shevchenko wrote: > > > > +#define IPCMSG_COLD_OFF0x80/* Only for Tangier > > */ > > Andy, I'm wondering are these magic numbers documented somewhere ? This one somewhere in

Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence

On Wed, 2016-09-07 at 15:53 +0100, Bryan O'Donoghue wrote: > On Wed, 2016-09-07 at 15:39 +0300, Andy Shevchenko wrote: > > > > +#define IPCMSG_COLD_OFF0x80/* Only for Tangier > > */ > > Andy, I'm wondering are these magic numbers documented somewhere ? This one somewhere in

Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence

On Wed, 2016-09-07 at 15:39 +0300, Andy Shevchenko wrote: > +#define IPCMSG_COLD_OFF0x80/* Only for Tangier > */ Andy, I'm wondering are these magic numbers documented somewhere ? --- bod

Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence

On Wed, 2016-09-07 at 15:39 +0300, Andy Shevchenko wrote: > +#define IPCMSG_COLD_OFF0x80/* Only for Tangier > */ Andy, I'm wondering are these magic numbers documented somewhere ? --- bod

[PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence

Tell SCU that we are about powering off the device. Signed-off-by: Andy Shevchenko --- v3: - fix type of variable (lkp) v2: - change abbrevation from PMU to PWRMU arch/x86/include/asm/intel-mid.h| 2 ++ arch/x86/include/asm/intel_scu_ipc.h| 2 ++

[PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence

Tell SCU that we are about powering off the device. Signed-off-by: Andy Shevchenko --- v3: - fix type of variable (lkp) v2: - change abbrevation from PMU to PWRMU arch/x86/include/asm/intel-mid.h| 2 ++ arch/x86/include/asm/intel_scu_ipc.h| 2 ++