[PATCH v3 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation

2018-04-03 Thread Sinan Kaya
writeX() has a strong ordering semantics with respect to memory updates. In the abscence of a write barrier or a compiler barrier, commpiler can reorder register and memory update instructions. This breaks the writeX() API. Signed-off-by: Sinan Kaya ---

[PATCH v3 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation

2018-04-03 Thread Sinan Kaya
writeX() has a strong ordering semantics with respect to memory updates. In the abscence of a write barrier or a compiler barrier, commpiler can reorder register and memory update instructions. This breaks the writeX() API. Signed-off-by: Sinan Kaya --- arch/mips/include/asm/io.h | 2 +- 1 file