Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-27 Thread ygardi
>> 2015-10-25 23:40 GMT+09:00 : 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : > Performing several writes to UFS host controller registers has > no gurrantee of ordering, so we must make sure register writes > to setup request list base address etc. are performed before the >

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-27 Thread ygardi
>> 2015-10-25 23:40 GMT+09:00 : 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : > Performing several writes to UFS host controller registers has > no gurrantee of ordering, so we must make sure register writes > to setup request list base

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-26 Thread ygardi
> 2015-10-25 23:40 GMT+09:00 : >>> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : Performing several writes to UFS host controller registers has no gurrantee of ordering, so we must make sure register writes to setup request list base address etc. are performed before the run/stop

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-26 Thread Akinobu Mita
2015-10-25 23:40 GMT+09:00 : >> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : >>> Performing several writes to UFS host controller registers has >>> no gurrantee of ordering, so we must make sure register writes >>> to setup request list base address etc. are performed before the >>> run/stop register

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-26 Thread ygardi
> 2015-10-25 23:40 GMT+09:00 : >>> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : Performing several writes to UFS host controller registers has no gurrantee of ordering, so we must make sure register writes to setup request list base address

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-26 Thread Akinobu Mita
2015-10-25 23:40 GMT+09:00 : >> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : >>> Performing several writes to UFS host controller registers has >>> no gurrantee of ordering, so we must make sure register writes >>> to setup request list base address etc.

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-25 Thread ygardi
> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : >> Performing several writes to UFS host controller registers has >> no gurrantee of ordering, so we must make sure register writes >> to setup request list base address etc. are performed before the >> run/stop register is enabled. >> In addition, when

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-25 Thread ygardi
> 2015-09-02 19:13 GMT+09:00 Yaniv Gardi : >> Performing several writes to UFS host controller registers has >> no gurrantee of ordering, so we must make sure register writes >> to setup request list base address etc. are performed before the >> run/stop register is enabled.

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-22 Thread Akinobu Mita
2015-09-02 19:13 GMT+09:00 Yaniv Gardi : > Performing several writes to UFS host controller registers has > no gurrantee of ordering, so we must make sure register writes > to setup request list base address etc. are performed before the > run/stop register is enabled. > In addition, when setting

Re: [PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-10-22 Thread Akinobu Mita
2015-09-02 19:13 GMT+09:00 Yaniv Gardi : > Performing several writes to UFS host controller registers has > no gurrantee of ordering, so we must make sure register writes > to setup request list base address etc. are performed before the > run/stop register is enabled. > In

[PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-09-02 Thread Yaniv Gardi
Performing several writes to UFS host controller registers has no gurrantee of ordering, so we must make sure register writes to setup request list base address etc. are performed before the run/stop register is enabled. In addition, when setting up a task request, we must make sure the updating

[PATCH v3 13/15] scsi: ufs: add missing memory barriers

2015-09-02 Thread Yaniv Gardi
Performing several writes to UFS host controller registers has no gurrantee of ordering, so we must make sure register writes to setup request list base address etc. are performed before the run/stop register is enabled. In addition, when setting up a task request, we must make sure the updating