Re: [PATCH v3 16/24] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

2017-01-31 Thread John Keeping
On Mon, 30 Jan 2017 16:57:36 -0500, Sean Paul wrote: > On Sun, Jan 29, 2017 at 01:24:36PM +, John Keeping wrote: > > These values are specified as constant time periods but the PHY > > configuration is in terms of the current lane byte clock so using > > constant values guarantees that the

Re: [PATCH v3 16/24] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

2017-01-31 Thread John Keeping
On Mon, 30 Jan 2017 16:57:36 -0500, Sean Paul wrote: > On Sun, Jan 29, 2017 at 01:24:36PM +, John Keeping wrote: > > These values are specified as constant time periods but the PHY > > configuration is in terms of the current lane byte clock so using > > constant values guarantees that the

Re: [PATCH v3 16/24] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

2017-01-30 Thread Sean Paul
On Sun, Jan 29, 2017 at 01:24:36PM +, John Keeping wrote: > These values are specified as constant time periods but the PHY > configuration is in terms of the current lane byte clock so using > constant values guarantees that the timings will be outside the > specification with some display

Re: [PATCH v3 16/24] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

2017-01-30 Thread Sean Paul
On Sun, Jan 29, 2017 at 01:24:36PM +, John Keeping wrote: > These values are specified as constant time periods but the PHY > configuration is in terms of the current lane byte clock so using > constant values guarantees that the timings will be outside the > specification with some display

[PATCH v3 16/24] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

2017-01-29 Thread John Keeping
These values are specified as constant time periods but the PHY configuration is in terms of the current lane byte clock so using constant values guarantees that the timings will be outside the specification with some display configurations. Derive the necessary configuration from the byte clock

[PATCH v3 16/24] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

2017-01-29 Thread John Keeping
These values are specified as constant time periods but the PHY configuration is in terms of the current lane byte clock so using constant values guarantees that the timings will be outside the specification with some display configurations. Derive the necessary configuration from the byte clock