On Wed, 2018-11-28 at 18:36 +0100, Stefan Agner wrote:
> On 28.11.2018 13:19, Stefan Agner wrote:
> > On 21.11.2018 14:47, Leonard Crestez wrote:
> > > My tests show that this series breaks pci cards on 6qdl and I
> > > think it should be reverted until a fix is found. Are you OK with
> > > this?
>
On 28.11.2018 18:50, Lucas Stach wrote:
> Am Mittwoch, den 28.11.2018, 18:36 +0100 schrieb Stefan Agner:
>> On 28.11.2018 13:19, Stefan Agner wrote:
>> > On 21.11.2018 14:47, Leonard Crestez wrote:
>> > > On 11/20/2018 11:28 PM, Trent Piepho wrote:
>> > > > On Tue, 2018-11-20 at 21:42 +0100, Stefan
Am Mittwoch, den 28.11.2018, 18:36 +0100 schrieb Stefan Agner:
> On 28.11.2018 13:19, Stefan Agner wrote:
> > On 21.11.2018 14:47, Leonard Crestez wrote:
> > > On 11/20/2018 11:28 PM, Trent Piepho wrote:
> > > > On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
> > > > > On 20.11.2018 20:13, T
On 28.11.2018 13:19, Stefan Agner wrote:
> On 21.11.2018 14:47, Leonard Crestez wrote:
>> On 11/20/2018 11:28 PM, Trent Piepho wrote:
>>> On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
On 20.11.2018 20:13, Trent Piepho wrote:
>>
> It also seems to me that this doesn't need to be in
On 21.11.2018 14:47, Leonard Crestez wrote:
> On 11/20/2018 11:28 PM, Trent Piepho wrote:
>> On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
>>> On 20.11.2018 20:13, Trent Piepho wrote:
>
It also seems to me that this doesn't need to be in the internal pci
config access functions.
On Mon, 2018-11-26 at 10:16 +, Leonard Crestez wrote:
> On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
> > On 20.11.2018 20:13, Trent Piepho wrote:
> > > On Tue, 2018-11-20 at 18:19 +, Leonard Crestez wrote:
> > > > On Tue, 2018-11-20 at 17:56 +0100, Stefan Agner wrote:
> > > > > De
On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
> On 20.11.2018 20:13, Trent Piepho wrote:
> > On Tue, 2018-11-20 at 18:19 +, Leonard Crestez wrote:
> > > On Tue, 2018-11-20 at 17:56 +0100, Stefan Agner wrote:
> > > > Define the length of the DBI registers. This makes sure that
> > > > t
On Wed, Nov 21, 2018 at 01:47:05PM +, Leonard Crestez wrote:
> On 11/20/2018 11:28 PM, Trent Piepho wrote:
> > On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
> >> On 20.11.2018 20:13, Trent Piepho wrote:
>
> >>> It also seems to me that this doesn't need to be in the internal pci
> >>>
On 11/20/2018 11:28 PM, Trent Piepho wrote:
> On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
>> On 20.11.2018 20:13, Trent Piepho wrote:
>>> It also seems to me that this doesn't need to be in the internal pci
>>> config access functions. The driver shouldn't be reading registers
>>> that
On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
> On 20.11.2018 20:13, Trent Piepho wrote:
> >
> > On IMX7d, there are significant blocks of 00s in the config space, and
> > all 0xff at 0xb50 on up.
> >
> > I.e., significant portions are empty, in the middle of the config
> > space, not ju
On 20.11.2018 20:13, Trent Piepho wrote:
> On Tue, 2018-11-20 at 18:19 +, Leonard Crestez wrote:
>> On Tue, 2018-11-20 at 17:56 +0100, Stefan Agner wrote:
>> > Define the length of the DBI registers. This makes sure that
>> > the kernel does not access registers beyond that point, avoiding
>> >
On Tue, 2018-11-20 at 18:19 +, Leonard Crestez wrote:
> On Tue, 2018-11-20 at 17:56 +0100, Stefan Agner wrote:
> > Define the length of the DBI registers. This makes sure that
> > the kernel does not access registers beyond that point, avoiding
> > the following abort on a i.MX 6Quad:
> > # c
On Tue, 2018-11-20 at 17:56 +0100, Stefan Agner wrote:
> Define the length of the DBI registers. This makes sure that
> the kernel does not access registers beyond that point, avoiding
> the following abort on a i.MX 6Quad:
> # cat
> /sys/devices/soc0/soc/1ffc000.pcie/pci\:00/\:00\:00.0/c
Define the length of the DBI registers. This makes sure that
the kernel does not access registers beyond that point, avoiding
the following abort on a i.MX 6Quad:
# cat /sys/devices/soc0/soc/1ffc000.pcie/pci\:00/\:00\:00.0/config
[ 100.021433] Unhandled fault: imprecise external abort
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