On Thu, Mar 08, 2018 at 01:53:13PM +, Dave Martin wrote:
> In practice, we don't race booting of two CPUs against each other
> IIUC.
Yup. Today, hotplugs are strictly serialized.
Several things would have to change for parallel hotplug to be feasible.
Thanks,
Mark.
On Wed, Mar 07, 2018 at 05:39:09PM +, Suzuki K Poulose wrote:
> On 09/02/18 18:58, Dave Martin wrote:
> >On Fri, Feb 09, 2018 at 05:55:12PM +, Suzuki K Poulose wrote:
> >>We enable hardware DBM bit in a capable CPU, very early in the
> >>boot via __cpu_setup. This doesn't give us a flexibil
On 09/02/18 18:58, Dave Martin wrote:
On Fri, Feb 09, 2018 at 05:55:12PM +, Suzuki K Poulose wrote:
We enable hardware DBM bit in a capable CPU, very early in the
boot via __cpu_setup. This doesn't give us a flexibility of
optionally disable the feature, as the clearing the bit
is a bit cost
On Fri, Feb 09, 2018 at 05:55:12PM +, Suzuki K Poulose wrote:
> We enable hardware DBM bit in a capable CPU, very early in the
> boot via __cpu_setup. This doesn't give us a flexibility of
> optionally disable the feature, as the clearing the bit
> is a bit costly as the TLB can cache the setti
We enable hardware DBM bit in a capable CPU, very early in the
boot via __cpu_setup. This doesn't give us a flexibility of
optionally disable the feature, as the clearing the bit
is a bit costly as the TLB can cache the settings. Instead,
we delay enabling the feature until the CPU is brought up
in
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