Peter,
On Mon, Oct 28, 2013 at 1:17 PM, Peter Zijlstra wrote:
> On Mon, Oct 28, 2013 at 11:33:50AM +0100, Stephane Eranian wrote:
>> If we have that, then it may not be necessary anymore
>> to express the raw count in the 1/2^32 J unit like we
>> are currently doing. This loses a bit of precision
On Mon, Oct 28, 2013 at 11:33:50AM +0100, Stephane Eranian wrote:
> If we have that, then it may not be necessary anymore
> to express the raw count in the 1/2^32 J unit like we
> are currently doing. This loses a bit of precision. We
> could as well expose the actual raw count and export
> the act
Hi,
I was thinking about the scaling issue over the week-end.
We agreed that it was necessary to export the
scaling via sysfs per event. The RAPL v3 has
an implementation of that including in the perf tool.
If we have that, then it may not be necessary anymore
to express the raw count in the 1/2
On Fri, Oct 25, 2013 at 1:14 PM, Jiri Olsa wrote:
> On Wed, Oct 23, 2013 at 02:58:04PM +0200, Stephane Eranian wrote:
>
> SNIP
>
>> +
>> +static void rapl_init_cpu(int cpu)
>> +{
>> + int i, phys_id = topology_physical_package_id(cpu);
>> +
>> + spin_lock(&rapl_hotplug_lock);
>> +
>> +
On Wed, Oct 23, 2013 at 02:58:04PM +0200, Stephane Eranian wrote:
SNIP
> +
> +static void rapl_init_cpu(int cpu)
> +{
> + int i, phys_id = topology_physical_package_id(cpu);
> +
> + spin_lock(&rapl_hotplug_lock);
> +
> + /* check if phys_is is already covered */
> + for_each_cpu(i
On Wed, Oct 23, 2013 at 02:58:04PM +0200, Stephane Eranian wrote:
SNIP
> + pmu = per_cpu(rapl_pmu, i);
> + if (pmu) {
> + per_cpu(rapl_pmu, cpu) = pmu;
> + atomic_inc(&pmu->refcnt);
> +
On Wed, Oct 23, 2013 at 02:58:04PM +0200, Stephane Eranian wrote:
SNIP
> +
> + perf_cpu_notifier(rapl_cpu_notifier);
> +
> + ret = perf_pmu_register(&rapl_pmu_class, "power", -1);
> + WARN_ON(ret);
> + if (!ret) {
> + pr_info("RAPL PMU detected, registration failed, RA
This patch adds a new uncore PMU to expose the Intel
RAPL energy consumption counters. Up to 3 counters,
each counting a particular RAPL event are exposed.
The RAPL counters are available on Intel SandyBridge,
IvyBridge, Haswell. The server skus add a 3rd counter.
The following events are availab
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