Re: [PATCH v3 3/5] x86/mm: Optionally flush L1D on context switch

2020-12-04 Thread Singh, Balbir
On Fri, 2020-12-04 at 22:21 +0100, Thomas Gleixner wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you can confirm the sender and know the > content is safe. > > > > On Fri, Nov 27 2020 at 17:59, Balbir Singh wrote: > >

Re: [PATCH v3 3/5] x86/mm: Optionally flush L1D on context switch

2020-12-04 Thread Thomas Gleixner
On Fri, Nov 27 2020 at 17:59, Balbir Singh wrote: > > + /* > + * Flush only if SMT is disabled as per the contract, which is checked > + * when the feature is enabled. > + */ > + if (sched_smt_active() && !this_cpu_read(cpu_info.smt_active) && > + (prev_mm &

[PATCH v3 3/5] x86/mm: Optionally flush L1D on context switch

2020-11-26 Thread Balbir Singh
Implement a mechanism to selectively flush the L1D cache. The goal is to allow tasks that want to save sensitive information, found by the recent snoop assisted data sampling vulnerabilites, to flush their L1D on being switched out. This protects their data from being snooped or leaked via side