Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Hi Lukasz, On 19. 2. 11. 오후 7:21, Lukasz Luba wrote: > Hi Chanwoo, > > On 2/3/19 8:54 AM, Chanwoo Choi wrote: >> Hi Lukasz, >> >> 2019년 2월 1일 (금) 오후 11:22, Lukasz Luba 님이 작성: >> >>> >>> Hi Chanwoo, >>> >>> On 2/1/19 9:44 AM, Chanwoo Choi wrote: Hi, On 19. 1. 31. 오후 5:49, Lukasz

Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Hi Chanwoo, On 2/3/19 8:54 AM, Chanwoo Choi wrote: > Hi Lukasz, > > 2019년 2월 1일 (금) 오후 11:22, Lukasz Luba 님이 작성: > >> >> Hi Chanwoo, >> >> On 2/1/19 9:44 AM, Chanwoo Choi wrote: >>> Hi, >>> >>> On 19. 1. 31. 오후 5:49, Lukasz Luba wrote: Add new table rate for BPLL for Exynos5422 SoC

Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Hi Lukasz, 2019년 2월 1일 (금) 오후 11:22, Lukasz Luba 님이 작성: > > Hi Chanwoo, > > On 2/1/19 9:44 AM, Chanwoo Choi wrote: > > Hi, > > > > On 19. 1. 31. 오후 5:49, Lukasz Luba wrote: > >> Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory > >> Controller frequencies for driver's DRAM

Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Hi Sylwester, On 2/1/19 3:19 PM, Sylwester Nawrocki wrote: > On 2/1/19 14:56, Lukasz Luba wrote: >>> Exynos5422 used the same PLL table for apll, kpll, bpll and so on. >>> You don't need to make the separate pll table. Just add new entries >>> to exynos5420_pll2550x_24mhz_tbl table. >> OK, I will

Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

On 2/1/19 14:56, Lukasz Luba wrote: >> Exynos5422 used the same PLL table for apll, kpll, bpll and so on. >> You don't need to make the separate pll table. Just add new entries >> to exynos5420_pll2550x_24mhz_tbl table. > OK, I will extend the exynos5420_pll2550x_24mhz_tbl table. > > In v4 patch

Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Hi Chanwoo, On 2/1/19 9:44 AM, Chanwoo Choi wrote: > Hi, > > On 19. 1. 31. 오후 5:49, Lukasz Luba wrote: >> Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory >> Controller frequencies for driver's DRAM timings. >> >> CC: Sylwester Nawrocki >> CC: Chanwoo Choi >> CC:

Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Hi, On 19. 1. 31. 오후 5:49, Lukasz Luba wrote: > Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory > Controller frequencies for driver's DRAM timings. > > CC: Sylwester Nawrocki > CC: Chanwoo Choi > CC: Michael Turquette > CC: Stephen Boyd > CC: Kukjin Kim > CC:

[PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory Controller frequencies for driver's DRAM timings. CC: Sylwester Nawrocki CC: Chanwoo Choi CC: Michael Turquette CC: Stephen Boyd CC: Kukjin Kim CC: Krzysztof Kozlowski CC: linux-samsung-...@vger.kernel.org CC: