Hi Guenter , Timur
On 30 May 2015 at 06:10, Guenter Roeck wrote:
> On 05/29/2015 08:46 AM, Timur Tabi wrote:
>>
>> On 05/29/2015 09:32 AM, Fu Wei wrote:
>>>
>>> It is a SPI, every CPU can get it,
>>> But maybe I miss something, but please let me know if other CPU can
>>> not get the interrupt.
Hi Guenter , Timur
On 30 May 2015 at 06:10, Guenter Roeck li...@roeck-us.net wrote:
On 05/29/2015 08:46 AM, Timur Tabi wrote:
On 05/29/2015 09:32 AM, Fu Wei wrote:
It is a SPI, every CPU can get it,
But maybe I miss something, but please let me know if other CPU can
not get the interrupt.
On 05/29/2015 08:46 AM, Timur Tabi wrote:
On 05/29/2015 09:32 AM, Fu Wei wrote:
It is a SPI, every CPU can get it,
But maybe I miss something, but please let me know if other CPU can
not get the interrupt.
There's only one watchdog device, so there's only one interrupt. I don't know
which
On 05/29/2015 12:53 PM, Fu Wei wrote:
If this interrupter is triggered, that means system has goes wrong,
who knows what is wrong ,
I have to make sure that system get into that routine ,because of the
WS0, if not I won't do panic.
But the interrupt handler is not registered as shared, which
Hi Timur
On 29 May 2015 at 23:46, Timur Tabi wrote:
> On 05/29/2015 09:32 AM, Fu Wei wrote:
>>
>> It is a SPI, every CPU can get it,
>> But maybe I miss something, but please let me know if other CPU can
>> not get the interrupt.
>
>
> There's only one watchdog device, so there's only one
On 05/29/2015 09:32 AM, Fu Wei wrote:
It is a SPI, every CPU can get it,
But maybe I miss something, but please let me know if other CPU can
not get the interrupt.
There's only one watchdog device, so there's only one interrupt. I
don't know which CPU will get the interrupt, but the watchdog
Hi Guenter,
On 29 May 2015 at 22:54, Guenter Roeck wrote:
> On 05/29/2015 02:11 AM, Fu Wei wrote:
> [ ... ]
>
+
+ status = sbsa_gwdt_cf_read(SBSA_GWDT_WCS, wdd);
+ if (status & SBSA_GWDT_WCS_WS1) {
+ dev_warn(dev, "System reset by WDT(WCS: %x, WCV:
On 05/29/2015 02:11 AM, Fu Wei wrote:
[ ... ]
+
+ status = sbsa_gwdt_cf_read(SBSA_GWDT_WCS, wdd);
+ if (status & SBSA_GWDT_WCS_WS1) {
+ dev_warn(dev, "System reset by WDT(WCS: %x, WCV: %llx)\n",
+status, sbsa_gwdt_get_wcv(wdd));
Does this
Hi Timur
On 29 May 2015 at 21:28, Timur Tabi wrote:
> Fu Wei wrote:
>>>
>>> This should always be true. Instead of reading WCS, I think you should
>>> just
>>> >panic().
>
>
>> I thinks I need to confirm it , in case this has been cleaned.
>
>
> I don't see how it's possible for you to receive
Fu Wei wrote:
This should always be true. Instead of reading WCS, I think you should just
>panic().
I thinks I need to confirm it , in case this has been cleaned.
I don't see how it's possible for you to receive the interrupt and have
WCS be cleared.
--
Sent by an employee of the
Hi Timur,
On 27 May 2015 at 00:50, Timur Tabi wrote:
> On 05/25/2015 05:03 AM, fu@linaro.org wrote:
>
>> +/*
>> + * help functions for accessing 32bit registers of SBSA Generic Watchdog
>> + */
>> +static void sbsa_gwdt_cf_write(unsigned int reg, u32 val,
>> +
Hi Guenter,
Great thanks, feedback inline
On 26 May 2015 at 03:39, Guenter Roeck wrote:
> On 05/25/2015 03:03 AM, fu@linaro.org wrote:
>>
>> From: Fu Wei
>>
>> This driver bases on linux kernel watchdog framework, and
>> use "pretimeout" in the framework. It supports getting timeout and
>>
Hi Guenter,
Great thanks, feedback inline
On 26 May 2015 at 03:39, Guenter Roeck li...@roeck-us.net wrote:
On 05/25/2015 03:03 AM, fu@linaro.org wrote:
From: Fu Wei fu@linaro.org
This driver bases on linux kernel watchdog framework, and
use pretimeout in the framework. It supports
Hi Timur,
On 27 May 2015 at 00:50, Timur Tabi ti...@codeaurora.org wrote:
On 05/25/2015 05:03 AM, fu@linaro.org wrote:
+/*
+ * help functions for accessing 32bit registers of SBSA Generic Watchdog
+ */
+static void sbsa_gwdt_cf_write(unsigned int reg, u32 val,
+
Fu Wei wrote:
This should always be true. Instead of reading WCS, I think you should just
panic().
I thinks I need to confirm it , in case this has been cleaned.
I don't see how it's possible for you to receive the interrupt and have
WCS be cleared.
--
Sent by an employee of the
Hi Guenter,
On 29 May 2015 at 22:54, Guenter Roeck li...@roeck-us.net wrote:
On 05/29/2015 02:11 AM, Fu Wei wrote:
[ ... ]
+
+ status = sbsa_gwdt_cf_read(SBSA_GWDT_WCS, wdd);
+ if (status SBSA_GWDT_WCS_WS1) {
+ dev_warn(dev, System reset by WDT(WCS: %x, WCV:
On 05/29/2015 09:32 AM, Fu Wei wrote:
It is a SPI, every CPU can get it,
But maybe I miss something, but please let me know if other CPU can
not get the interrupt.
There's only one watchdog device, so there's only one interrupt. I
don't know which CPU will get the interrupt, but the watchdog
On 05/29/2015 02:11 AM, Fu Wei wrote:
[ ... ]
+
+ status = sbsa_gwdt_cf_read(SBSA_GWDT_WCS, wdd);
+ if (status SBSA_GWDT_WCS_WS1) {
+ dev_warn(dev, System reset by WDT(WCS: %x, WCV: %llx)\n,
+status, sbsa_gwdt_get_wcv(wdd));
Does this
Hi Timur
On 29 May 2015 at 23:46, Timur Tabi ti...@codeaurora.org wrote:
On 05/29/2015 09:32 AM, Fu Wei wrote:
It is a SPI, every CPU can get it,
But maybe I miss something, but please let me know if other CPU can
not get the interrupt.
There's only one watchdog device, so there's only
On 05/29/2015 12:53 PM, Fu Wei wrote:
If this interrupter is triggered, that means system has goes wrong,
who knows what is wrong ,
I have to make sure that system get into that routine ,because of the
WS0, if not I won't do panic.
But the interrupt handler is not registered as shared, which
On 05/29/2015 08:46 AM, Timur Tabi wrote:
On 05/29/2015 09:32 AM, Fu Wei wrote:
It is a SPI, every CPU can get it,
But maybe I miss something, but please let me know if other CPU can
not get the interrupt.
There's only one watchdog device, so there's only one interrupt. I don't know
which
Hi Timur
On 29 May 2015 at 21:28, Timur Tabi ti...@codeaurora.org wrote:
Fu Wei wrote:
This should always be true. Instead of reading WCS, I think you should
just
panic().
I thinks I need to confirm it , in case this has been cleaned.
I don't see how it's possible for you to receive
On 05/25/2015 05:03 AM, fu@linaro.org wrote:
+/*
+ * help functions for accessing 32bit registers of SBSA Generic Watchdog
+ */
+static void sbsa_gwdt_cf_write(unsigned int reg, u32 val,
+ struct watchdog_device *wdd)
+{
+ struct sbsa_gwdt *gwdt =
On 05/25/2015 05:03 AM, fu@linaro.org wrote:
+/*
+ * help functions for accessing 32bit registers of SBSA Generic Watchdog
+ */
+static void sbsa_gwdt_cf_write(unsigned int reg, u32 val,
+ struct watchdog_device *wdd)
+{
+ struct sbsa_gwdt *gwdt =
On 05/25/2015 03:03 AM, fu@linaro.org wrote:
From: Fu Wei
This driver bases on linux kernel watchdog framework, and
use "pretimeout" in the framework. It supports getting timeout and
pretimeout from parameter and FDT at the driver init stage.
In first timeout, the interrupt routine run
From: Fu Wei
This driver bases on linux kernel watchdog framework, and
use "pretimeout" in the framework. It supports getting timeout and
pretimeout from parameter and FDT at the driver init stage.
In first timeout, the interrupt routine run panic to save
system context.
Acked-by: Arnd Bergmann
From: Fu Wei fu@linaro.org
This driver bases on linux kernel watchdog framework, and
use pretimeout in the framework. It supports getting timeout and
pretimeout from parameter and FDT at the driver init stage.
In first timeout, the interrupt routine run panic to save
system context.
On 05/25/2015 03:03 AM, fu@linaro.org wrote:
From: Fu Wei fu@linaro.org
This driver bases on linux kernel watchdog framework, and
use pretimeout in the framework. It supports getting timeout and
pretimeout from parameter and FDT at the driver init stage.
In first timeout, the interrupt
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