[PATCH v3 5/6] arm64: tegra: Enable AHCI on Jetson TX2

[Sowjanya Komatineni]

This patch enables AHCI on Jetson TX2.

Signed-off-by: Sowjanya Komatineni <skomatin...@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts |  4 ++++
 arch/arm64/boot/dts/nvidia/tegra186.dtsi           | 28 ++++++++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts 
b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index c28d51c..6fd2e05 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -285,6 +285,10 @@
                };
        };
 
+       sata@3507000 {
+               status = "okay";
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
 
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi 
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 98544d1..a303f45 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1503,6 +1503,34 @@
                };
        };
 
+       sata@3507000 {
+               compatible = "nvidia,tegra186-ahci";
+               reg = <0x0 0x03507000 0x0 0x00002000>, /* AHCI */
+                     <0x0 0x03500000 0x0 0x00007000>, /* SATA */
+                     <0x0 0x03A90000 0x0 0x00010000>; /* SATA AUX */
+               interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+
+               power-domains = <&bpmp TEGRA186_POWER_DOMAIN_SAX>;
+               interconnects = <&mc TEGRA186_MEMORY_CLIENT_SATAR &emc>,
+                               <&mc TEGRA186_MEMORY_CLIENT_SATAW &emc>;
+               interconnect-names = "dma-mem", "write";
+               iommus = <&smmu TEGRA186_SID_SATA>;
+
+               clocks = <&bpmp TEGRA186_CLK_SATA>,
+                        <&bpmp TEGRA186_CLK_SATA_OOB>;
+               clock-names = "sata", "sata-oob";
+               assigned-clocks = <&bpmp TEGRA186_CLK_SATA>,
+                                 <&bpmp TEGRA186_CLK_SATA_OOB>;
+               assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>,
+                                        <&bpmp TEGRA186_CLK_PLLP>;
+               assigned-clock-rates = <102000000>,
+                                      <204000000>;
+               resets = <&bpmp TEGRA186_RESET_SATA>,
+                       <&bpmp TEGRA186_RESET_SATACOLD>;
+               reset-names = "sata", "sata-cold";
+               status = "disabled";
+       };
+
        bpmp: bpmp {
                compatible = "nvidia,tegra186-bpmp";
                interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
-- 
2.7.4