Quoting Boris BREZILLON (2014-05-14 00:30:59)
> Hello Mike,
>
> On 14/05/2014 02:51, Mike Turquette wrote:
> > Quoting Boris BREZILLON (2014-05-09 04:11:49)
> >> +struct clk_ops ar100_ops = {
> >> + .recalc_rate = ar100_recalc_rate,
> >> + .determine_rate = ar100_determine_rate,
> >> +
Hello Mike,
On 14/05/2014 02:51, Mike Turquette wrote:
> Quoting Boris BREZILLON (2014-05-09 04:11:49)
>> +struct clk_ops ar100_ops = {
>> + .recalc_rate = ar100_recalc_rate,
>> + .determine_rate = ar100_determine_rate,
>> + .set_parent = ar100_set_parent,
>> + .get_parent
Quoting Boris BREZILLON (2014-05-09 04:11:49)
> +struct clk_ops ar100_ops = {
> + .recalc_rate = ar100_recalc_rate,
> + .determine_rate = ar100_determine_rate,
> + .set_parent = ar100_set_parent,
> + .get_parent = ar100_get_parent,
> + .set_rate = ar100_set_rate,
> +};
Hi Boris,
First of all, thanks for working on this :)
While reading the code below I noticed a complete lack of comments. I
think it would be good to have at least some to aid readability,
considering these clocks are poorly documented on AW's material.
El 09/05/14 08:11, Boris BREZILLON esc
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk peripherals connected to the APB0 bus
Add support for these clks in a separate driver s
5 matches
Mail list logo
