Re: [PATCH v3 6/6] clk: axi-clkgen: Add support for FPGA info

2020-09-24 Thread Alexandru Ardelean
On Thu, Sep 24, 2020 at 5:21 PM Moritz Fischer wrote: > > On Thu, Sep 24, 2020 at 09:50:12AM +0300, Alexandru Ardelean wrote: > > From: Mircea Caprioru > > > > This patch adds support for vco maximum and minimum ranges in accordance > > with fpga speed grade, voltage, device package, technology a

Re: [PATCH v3 6/6] clk: axi-clkgen: Add support for FPGA info

2020-09-24 Thread Moritz Fischer
On Thu, Sep 24, 2020 at 09:50:12AM +0300, Alexandru Ardelean wrote: > From: Mircea Caprioru > > This patch adds support for vco maximum and minimum ranges in accordance > with fpga speed grade, voltage, device package, technology and family. This > new information is extracted from two new regist

[PATCH v3 6/6] clk: axi-clkgen: Add support for FPGA info

2020-09-23 Thread Alexandru Ardelean
From: Mircea Caprioru This patch adds support for vco maximum and minimum ranges in accordance with fpga speed grade, voltage, device package, technology and family. This new information is extracted from two new registers implemented in the ip core: ADI_REG_FPGA_INFO and ADI_REG_FPGA_VOLTAGE, wh