Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-14 Thread Anatolij Gustschin
On Wed, 3 May 2017 18:01:19 +0300 Andy Shevchenko andy.shevche...@gmail.com wrote: ... >> when 12 LSBs are zero, the bytes value has been decremented by >> 4k, meaning that a new 4k data block has been written. Only >> then the error checking is performed. > >If the size is less than 4k...? then

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-03 Thread Andy Shevchenko
On Wed, May 3, 2017 at 3:14 AM, Anatolij Gustschin wrote: > On Wed, 3 May 2017 00:28:17 +0300 > Andy Shevchenko andy.shevche...@gmail.com wrote: > + udelay(1); /* wait 1us */ Why not 10? Needs a comment. >>> >>> if this is not obvious, >> >>No, it's not. Especially

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-03 Thread Alan Tull
On Tue, May 2, 2017 at 7:14 PM, Anatolij Gustschin wrote: > On Wed, 3 May 2017 00:28:17 +0300 > Andy Shevchenko andy.shevche...@gmail.com wrote: > ... Is 0xff a mask here? (Btw, you missed spaces around <<) >>> >>> yes, it is. Will add spaces (checkpatch didn't warn here). >> >>Then it makes s

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-02 Thread Anatolij Gustschin
On Tue, 02 May 2017 16:36:54 -0700 Joe Perches j...@perches.com wrote: ... >It would with command line option --strict, otherwise not. ah, good to know. Thanks!

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-02 Thread Anatolij Gustschin
On Wed, 3 May 2017 00:28:17 +0300 Andy Shevchenko andy.shevche...@gmail.com wrote: ... >>>Is 0xff a mask here? (Btw, you missed spaces around <<) >> >> yes, it is. Will add spaces (checkpatch didn't warn here). > >Then it makes sense to add _MASK and use GENMASK() instead of direct value. ok,

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-02 Thread Joe Perches
On Tue, 2017-05-02 at 11:53 +0200, Anatolij Gustschin wrote: > On Mon, 1 May 2017 23:06:16 +0300 Andy Shevchenko andy.shevche...@gmail.com > wrote: > > > +#define VSEC_CVP_MODE_CTRL_NUMCLKS (0xff<<8) /* CVP_NUMCLKS */ > > > > Is 0xff a mask here? (Btw, you missed spaces around <<) > > yes,

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-02 Thread Andy Shevchenko
On Tue, May 2, 2017 at 12:53 PM, Anatolij Gustschin wrote: > On Mon, 1 May 2017 23:06:16 +0300 > Andy Shevchenko andy.shevche...@gmail.com wrote: >>On Sun, Apr 30, 2017 at 10:08 PM, Anatolij Gustschin wrote: >>> +#define VSEC_CVP_MODE_CTRL (VSEC_OFFSET + 0x20)/* 32bit */ >>> +#de

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-02 Thread Anatolij Gustschin
On Mon, 1 May 2017 23:06:16 +0300 Andy Shevchenko andy.shevche...@gmail.com wrote: >On Sun, Apr 30, 2017 at 10:08 PM, Anatolij Gustschin wrote: >> Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V >> and Arria-10 FPGAs via CvP. > >I think you need to spend time on polishing such c

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-01 Thread Andy Shevchenko
On Sun, Apr 30, 2017 at 10:08 PM, Anatolij Gustschin wrote: > Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V > and Arria-10 FPGAs via CvP. I think you need to spend time on polishing such code. See my comments below. > +#define CVP_BAR0 /* BAR used for dat

Re: [PATCH v4] fpga manager: Add Altera CvP driver

2017-05-01 Thread Alan Tull
On Sun, Apr 30, 2017 at 2:08 PM, Anatolij Gustschin wrote: Hi Anatolij, Looks good! > Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V > and Arria-10 FPGAs via CvP. > > Signed-off-by: Anatolij Gustschin Signed-off-by: Alan Tull

[PATCH v4] fpga manager: Add Altera CvP driver

2017-04-30 Thread Anatolij Gustschin
Add FPGA manager driver for loading Arria-V/Cyclone-V/Stratix-V and Arria-10 FPGAs via CvP. Signed-off-by: Anatolij Gustschin --- Changes in v4: - Update description about supported FPGA models in Kconfig and commit log - use writel() for iomem accesses - factor out dummy write code