On Thu, 2016-04-21 at 15:10 +0200, Peter Zijlstra wrote:
> On Wed, Apr 20, 2016 at 10:21:14PM +0200, Rafael J. Wysocki wrote:
> > You can send both and they both can go in via tip as far as I'm
> > concerned.
>
> OK, thanks!
>
> Srinivas I've munged the rapl patch to match the new style, so no
>
On Wed, Apr 20, 2016 at 10:21:14PM +0200, Rafael J. Wysocki wrote:
> You can send both and they both can go in via tip as far as I'm concerned.
OK, thanks!
Srinivas I've munged the rapl patch to match the new style, so no need
to resend that.
On Wed, Apr 20, 2016 at 8:28 PM, Srinivas Pandruvada
wrote:
> On Wed, 2016-04-20 at 15:59 +0200, Peter Zijlstra wrote:
>> On Sun, Apr 17, 2016 at 03:02:59PM -0700, Srinivas Pandruvada wrote:
>> >
>> > Skylake processor supports a new set of RAPL registers for
>> > controlling
>> > entire SoC inste
On Wed, 2016-04-20 at 15:59 +0200, Peter Zijlstra wrote:
> On Sun, Apr 17, 2016 at 03:02:59PM -0700, Srinivas Pandruvada wrote:
> >
> > Skylake processor supports a new set of RAPL registers for
> > controlling
> > entire SoC instead of just CPU package called PSys. This change
> > adds
> > suppor
On Sun, Apr 17, 2016 at 03:02:59PM -0700, Srinivas Pandruvada wrote:
> Skylake processor supports a new set of RAPL registers for controlling
> entire SoC instead of just CPU package called PSys. This change adds
> support in two sub systems:
>
> x86/perf: Adds basic support for Skylake RAPL and P
Skylake processor supports a new set of RAPL registers for controlling
entire SoC instead of just CPU package called PSys. This change adds
support in two sub systems:
x86/perf: Adds basic support for Skylake RAPL and PSys support
powercap/rapl: A new platform domain to the current power capping
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