On Fri, Feb 24, 2017 at 11:56:48AM +0100, Peter Zijlstra wrote:
>
>
> These 4 patches (7,8,9,10) look good to me.
>
> Thanks!
>
> Acked-by: Peter Zijlstra (Intel)
Thanks Peter
These 4 patches (7,8,9,10) look good to me.
Thanks!
Acked-by: Peter Zijlstra (Intel)
From: Stefan Kristiansson
This utilize the load-link/store-conditional l.lwa and l.swa
instructions to implement the atomic bitops.
When those instructions are not available emulation is provided.
Cc: Peter Zijlstra
Signed-off-by: Stefan Kristiansson
[sho...@gmail.com: remove OPENRISC_HAVE_INS
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