Re: [PATCH v4 1/2] FPGA: Add TS-7300 FPGA manager

On Sun, Dec 18, 2016 at 6:09 PM, Alan Tull wrote: > On Sun, 18 Dec 2016, Florian Fainelli wrote: > > Hi Florain, > >> Add support for loading bitstreams on the Altera Cyclone II FPGA >> populated on the TS-7300 board. This is done through the configuration >> and data registers offered through a m

Re: [PATCH v4 1/2] FPGA: Add TS-7300 FPGA manager

On Sun, 18 Dec 2016, Florian Fainelli wrote: Hi Florain, > Add support for loading bitstreams on the Altera Cyclone II FPGA > populated on the TS-7300 board. This is done through the configuration > and data registers offered through a memory interface between the EP93xx > SoC and the FPGA via an

[PATCH v4 1/2] FPGA: Add TS-7300 FPGA manager

Add support for loading bitstreams on the Altera Cyclone II FPGA populated on the TS-7300 board. This is done through the configuration and data registers offered through a memory interface between the EP93xx SoC and the FPGA via an intermediate CPLD device. The EP93xx SoC on the TS-7300 does not