Re: [PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

Hi, On 4/6/2018 1:37 AM, Stephen Boyd wrote: > Quoting Doug Anderson (2018-03-29 13:55:55) >> Hi, >> >> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote: >>> The USB and PCIE pipe clocks are sourced from external clocks >>> inside the QMP USB/PCIE PHYs. Enabling or

Re: [PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

Hi, On 4/6/2018 1:37 AM, Stephen Boyd wrote: > Quoting Doug Anderson (2018-03-29 13:55:55) >> Hi, >> >> On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote: >>> The USB and PCIE pipe clocks are sourced from external clocks >>> inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG >>>

Re: [PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

Quoting Doug Anderson (2018-03-29 13:55:55) > Hi, > > On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote: > > The USB and PCIE pipe clocks are sourced from external clocks > > inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG > > clocks is dependent on PHY

Re: [PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

Quoting Doug Anderson (2018-03-29 13:55:55) > Hi, > > On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote: > > The USB and PCIE pipe clocks are sourced from external clocks > > inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG > > clocks is dependent on PHY initialization sequence

Re: [PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

Hi, On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote: > The USB and PCIE pipe clocks are sourced from external clocks > inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG > clocks is dependent on PHY initialization sequence hence > update halt_check to

Re: [PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

Hi, On Thu, Mar 29, 2018 at 4:04 AM, Manu Gautam wrote: > The USB and PCIE pipe clocks are sourced from external clocks > inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG > clocks is dependent on PHY initialization sequence hence > update halt_check to BRANCH_HALT_DELAY for these

[PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

The USB and PCIE pipe clocks are sourced from external clocks inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG clocks is dependent on PHY initialization sequence hence update halt_check to BRANCH_HALT_DELAY for these clocks so that clock status bit is not polled when enabling or

[PATCH v4 1/7] clk: msm8996-gcc: change halt check for USB/PCIE pipe_clk

The USB and PCIE pipe clocks are sourced from external clocks inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG clocks is dependent on PHY initialization sequence hence update halt_check to BRANCH_HALT_DELAY for these clocks so that clock status bit is not polled when enabling or