The high frequency pll is required on compatible Qualcomm SoCs to support the CPU frequency scaling feature.
Co-developed-by: Niklas Cassel <niklas.cas...@linaro.org> Signed-off-by: Niklas Cassel <niklas.cas...@linaro.org> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-or...@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.anders...@linaro.org> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 34c3ac4e4b79..04b7fb26a942 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -698,6 +698,7 @@ CONFIG_MSM_MMCC_8996=y CONFIG_MSM_GCC_8998=y CONFIG_QCS_GCC_404=y CONFIG_SDM_GCC_845=y +CONFIG_QCOM_HFPLL=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_ARM_MHU=y -- 2.22.0