Re: [PATCH v4 2/2] RISC-V: Setup initial page tables in two stages

On Mon, May 20, 2019 at 5:13 PM Christoph Hellwig wrote: > > > void __init parse_dtb(unsigned int hartid, void *dtb) > > { > > - if (early_init_dt_scan(__va(dtb))) > > + dtb = (void *)fix_to_virt(FIX_FDT) + ((uintptr_t)dtb & ~PAGE_MASK); > > + if (early_init_dt_scan(dtb)) > > FYI,

Re: [PATCH v4 2/2] RISC-V: Setup initial page tables in two stages

> void __init parse_dtb(unsigned int hartid, void *dtb) > { > - if (early_init_dt_scan(__va(dtb))) > + dtb = (void *)fix_to_virt(FIX_FDT) + ((uintptr_t)dtb & ~PAGE_MASK); > + if (early_init_dt_scan(dtb)) FYI, parse_dtb in mainline now lost the hartid argument and takes a phys_addr_t

[PATCH v4 2/2] RISC-V: Setup initial page tables in two stages

Currently, the setup_vm() does initial page table setup in one-shot very early before enabling MMU. Due to this, the setup_vm() has to map all possible kernel virtual addresses since it does not know size and location of RAM. This means we have kernel mappings for non-existent RAM and any buggy