On Mon, Mar 29, 2021 at 8:28 PM Sander Vanheule wrote:
> On Mon, 2021-03-29 at 13:26 +0300, Andy Shevchenko wrote:
> > On Fri, Mar 26, 2021 at 11:11 PM Sander Vanheule <
> > san...@svanheule.net> wrote:
...
> > AFAICS all, except one have this flag, I suggest you to do other way
> > around, i.e.
Hi Andy,
Thank you for clarifying your remarks. I'll support for building as a
module, and have implemented the gpio_irq_chip->init_hw() callback.
On Mon, 2021-03-29 at 13:26 +0300, Andy Shevchenko wrote:
> On Fri, Mar 26, 2021 at 11:11 PM Sander Vanheule <
> san...@svanheule.net> wrote:
> > On F
On Fri, Mar 26, 2021 at 11:11 PM Sander Vanheule wrote:
> On Fri, 2021-03-26 at 20:19 +0200, Andy Shevchenko wrote:
> > On Fri, Mar 26, 2021 at 2:05 PM Sander Vanheule
> > wrote:
...
> > > + bool "Realtek Otto GPIO support"
> >
> > Why not module?
>
> This driver is only useful on a few s
Hi Andy,
Replies inline below.
On Fri, 2021-03-26 at 20:19 +0200, Andy Shevchenko wrote:
> On Fri, Mar 26, 2021 at 2:05 PM Sander Vanheule
> wrote:
>
> > +config GPIO_REALTEK_OTTO
> > + bool "Realtek Otto GPIO support"
>
> Why not module?
This driver is only useful on a few specific MIP
On Fri, Mar 26, 2021 at 2:05 PM Sander Vanheule wrote:
>
> Realtek MIPS SoCs (platform name Otto) have GPIO controllers with up to
> 64 GPIOs, divided over two banks. Each bank has a set of registers for
> 32 GPIOs, with support for edge-triggered interrupts.
>
> Each GPIO bank consists of four 8-
Realtek MIPS SoCs (platform name Otto) have GPIO controllers with up to
64 GPIOs, divided over two banks. Each bank has a set of registers for
32 GPIOs, with support for edge-triggered interrupts.
Each GPIO bank consists of four 8-bit GPIO ports (ABCD and EFGH). Most
registers pack one bit per GPI
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