Quoting Maxime Ripard (2020-06-11 02:23:16)
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
>
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Rob
Quoting Maxime Ripard (2020-06-11 02:23:16)
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
>
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Rob
On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
>
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
Am 11.06.20 um 19:06 schrieb Florian Fainelli:
>
> On 6/11/2020 9:52 AM, Maxime Ripard wrote:
>> Hi Stefan,
>>
>> On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c
b/drivers/clk/bcm/clk-bcm2711-dvp.c
new file mode 100644
On 6/11/2020 9:52 AM, Maxime Ripard wrote:
> Hi Stefan,
>
> On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
>>> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c
>>> b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>> new file mode 100644
>>> index ..84dbc886e303
>>> --- /dev/null
Hi Stefan,
On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
> > diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c
> > b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > new file mode 100644
> > index ..84dbc886e303
> > --- /dev/null
> > +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > @@
Hi Maxime,
Am 11.06.20 um 11:23 schrieb Maxime Ripard:
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
>
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
>
The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.
Let's expose that through a clock driver implementing a clock and reset
provider.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Rob Herring
Cc: linux-...@vger.kernel.org
Cc:
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