Hi Arnd,
On Thu, 10 Dec 2020 at 23:28, Arnd Bergmann wrote:
> > I did think about this and I did this with the clk mux driver I
> > haven't pushed yet. In that case there is a random lump of registers
> > with some muxes mixed into it so I decided to make the lump a syscon
> > and then have a
Hi Andy,
On Thu, 10 Dec 2020 at 23:22, Andy Shevchenko wrote:
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
>
> Perhaps ordered?
Ok. I did try to find some rules on includes, mainly what should be
included even though it's included in
On Sun, Nov 29, 2020 at 1:10 PM Daniel Palmer wrote:
>
> This adds a driver that supports the GPIO block found in
> MStar/SigmaStar ARMv7 SoCs.
>
> The controller seems to have enough register for 128 lines
> but where they are wired up differs between chips and
> no currently known chip uses
Hi Arnd,
On Thu, 10 Dec 2020 at 06:58, Arnd Bergmann wrote:
> These seem to just be contiguous ranges, so I probably would have
> suggested describing them as separate gpio controllers to avoid
> all the complexity with the names. As Linus already merged the
> driver into the gpio tree, I won't
This adds a driver that supports the GPIO block found in
MStar/SigmaStar ARMv7 SoCs.
The controller seems to have enough register for 128 lines
but where they are wired up differs between chips and
no currently known chip uses anywhere near 128 lines so there
needs to be some per-chip data to
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