On Sat, May 13, 2017 at 4:18 AM, Bjorn Andersson
wrote:
> On Wed 10 May 19:07 PDT 2017, Jassi Brar wrote:
>
>> On Thu, May 11, 2017 at 12:30 AM, Bjorn Andersson
>> wrote:
>> > On Tue 09 May 19:33 PDT 2017, Jassi Brar wrote:
> [..]
>> > So please let me know what you think about [1], if you don't
On Wed 10 May 19:07 PDT 2017, Jassi Brar wrote:
> On Thu, May 11, 2017 at 12:30 AM, Bjorn Andersson
> wrote:
> > On Tue 09 May 19:33 PDT 2017, Jassi Brar wrote:
[..]
> > So please let me know what you think about [1], if you don't like it
> > I'll fix the things pointed to by Stephen and we'll ha
On Thu, May 11, 2017 at 12:30 AM, Bjorn Andersson
wrote:
> On Tue 09 May 19:33 PDT 2017, Jassi Brar wrote:
>
>> On Wed, May 10, 2017 at 12:41 AM, Bjorn Andersson
>> wrote:
>> > On Tue 09 May 09:41 PDT 2017, Jassi Brar wrote:
> [..]
>> > The part where this piece of hardware differs from the other
On Tue 09 May 19:33 PDT 2017, Jassi Brar wrote:
> On Wed, May 10, 2017 at 12:41 AM, Bjorn Andersson
> wrote:
> > On Tue 09 May 09:41 PDT 2017, Jassi Brar wrote:
[..]
> > The part where this piece of hardware differs from the other mailboxes
> > is that TX is done as send_data() returns and in the
On Wed, May 10, 2017 at 12:41 AM, Bjorn Andersson
wrote:
> On Tue 09 May 09:41 PDT 2017, Jassi Brar wrote:
>>
>> >> >> The client should call mbox_client_txdone() after
>> >> >> mbox_send_message().
>> >> >
>> >> > So every time we call mbox_send_message() from any of the client drivers
>> >> >
On Tue 09 May 09:41 PDT 2017, Jassi Brar wrote:
> On Tue, May 9, 2017 at 12:41 AM, Bjorn Andersson
> wrote:
> > On Sun 07 May 23:47 PDT 2017, Jassi Brar wrote:
> >
> >> On Mon, May 8, 2017 at 11:24 AM, Bjorn Andersson
> >> wrote:
> >> > On Fri 05 May 21:48 PDT 2017, Jassi Brar wrote:
> >> >
> >>
On Tue, May 9, 2017 at 12:41 AM, Bjorn Andersson
wrote:
> On Sun 07 May 23:47 PDT 2017, Jassi Brar wrote:
>
>> On Mon, May 8, 2017 at 11:24 AM, Bjorn Andersson
>> wrote:
>> > On Fri 05 May 21:48 PDT 2017, Jassi Brar wrote:
>> >
>> > The APCS IPC register serves the basis for all inter-processor
>
On Sun 07 May 23:47 PDT 2017, Jassi Brar wrote:
> On Mon, May 8, 2017 at 11:24 AM, Bjorn Andersson
> wrote:
> > On Fri 05 May 21:48 PDT 2017, Jassi Brar wrote:
> >
> > The APCS IPC register serves the basis for all inter-processor
> > communication in a Qualcomm platform, so it's not only the RPM
On Mon, May 8, 2017 at 11:24 AM, Bjorn Andersson
wrote:
> On Fri 05 May 21:48 PDT 2017, Jassi Brar wrote:
>
> The APCS IPC register serves the basis for all inter-processor
> communication in a Qualcomm platform, so it's not only the RPM driver
> discussed earlier that uses this. It's also used fo
On Fri 05 May 21:48 PDT 2017, Jassi Brar wrote:
> On Sat, May 6, 2017 at 6:49 AM, Bjorn Andersson
> wrote:
> > On Fri 05 May 13:22 PDT 2017, Jassi Brar wrote:
>
> >> How is it supposed to work if a client queues more than one request?
> >
> > One such example is found in patch 5 in this series.
On Sat, May 6, 2017 at 6:49 AM, Bjorn Andersson
wrote:
> On Fri 05 May 13:22 PDT 2017, Jassi Brar wrote:
>> How is it supposed to work if a client queues more than one request?
>
> One such example is found in patch 5 in this series. There are two FIFOs
> in shared memory, one in each direction.
On Fri 05 May 13:22 PDT 2017, Jassi Brar wrote:
> On Sat, May 6, 2017 at 1:23 AM, Jeffrey Hugo wrote:
> > On 5/5/2017 1:22 PM, Jassi Brar wrote:
> >>
> >> On Sat, May 6, 2017 at 12:07 AM, Bjorn Andersson
> >> wrote:
> >>>
> >
> > There is no way to determine if the remote processor has observed
On 5/5/2017 2:22 PM, Jassi Brar wrote:
On Sat, May 6, 2017 at 1:23 AM, Jeffrey Hugo wrote:
On 5/5/2017 1:22 PM, Jassi Brar wrote:
On Sat, May 6, 2017 at 12:07 AM, Bjorn Andersson
wrote:
There is no way to determine if the remote processor has observed a message,
that does not involve pre
On Sat, May 6, 2017 at 1:23 AM, Jeffrey Hugo wrote:
> On 5/5/2017 1:22 PM, Jassi Brar wrote:
>>
>> On Sat, May 6, 2017 at 12:07 AM, Bjorn Andersson
>> wrote:
>>>
>
> There is no way to determine if the remote processor has observed a message,
> that does not involve pretty trivial race conditions
On 5/5/2017 1:22 PM, Jassi Brar wrote:
On Sat, May 6, 2017 at 12:07 AM, Bjorn Andersson
wrote:
On Fri 05 May 03:26 PDT 2017, Jassi Brar wrote:
On Fri, May 5, 2017 at 1:35 AM, Bjorn Andersson
wrote:
+
+static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
+{
+ struct
On Sat, May 6, 2017 at 12:07 AM, Bjorn Andersson
wrote:
> On Fri 05 May 03:26 PDT 2017, Jassi Brar wrote:
>
>> On Fri, May 5, 2017 at 1:35 AM, Bjorn Andersson
>> wrote:
>>
>> > +
>> > +static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
>> > +{
>> > + struct qcom_apcs_ipc
On Fri 05 May 03:26 PDT 2017, Jassi Brar wrote:
> On Fri, May 5, 2017 at 1:35 AM, Bjorn Andersson
> wrote:
>
> > +
> > +static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
> > +{
> > + struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
> > +
On Fri, May 5, 2017 at 1:35 AM, Bjorn Andersson
wrote:
> +
> +static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
> +{
> + struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
> + struct qcom_apcs_ipc, mbox);
> + unsi
This implements a driver that exposes the IPC bits found in the APCS
Global block in various Qualcomm platforms. The bits are used to signal
inter-processor communication signals from the application CPU to other
masters.
The driver implements the "doorbell" binding and could be used as basis
for
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