[PATCH v4 3/7] clk: axi-clkgen: add support for ZynqMP (UltraScale)

2020-09-29 Thread Alexandru Ardelean
From: Dragos Bogdan This IP core also works and is supported on the Xilinx ZynqMP (UltraScale) FPGA boards. This patch enables the driver to be available on these platforms as well. Signed-off-by: Dragos Bogdan Signed-off-by: Alexandru Ardelean --- drivers/clk/Kconfig | 2 +- 1 file changed,

[PATCH v4 3/7] clk: axi-clkgen: add support for ZynqMP (UltraScale)

2020-09-29 Thread Alexandru Ardelean
From: Dragos Bogdan This IP core also works and is supported on the Xilinx ZynqMP (UltraScale) FPGA boards. This patch enables the driver to be available on these platforms as well. Signed-off-by: Dragos Bogdan Signed-off-by: Alexandru Ardelean --- drivers/clk/Kconfig | 2 +- 1 file changed,