[PATCH v4 7/7] clk: axi-clkgen: Add support for FPGA info

2020-09-29 Thread Alexandru Ardelean
From: Mircea Caprioru This patch adds support for vco maximum and minimum ranges in accordance with fpga speed grade, voltage, device package, technology and family. This new information is extracted from two new registers implemented in the ip core: ADI_REG_FPGA_INFO and ADI_REG_FPGA_VOLTAGE, wh

[PATCH v4 7/7] clk: axi-clkgen: Add support for FPGA info

2020-09-29 Thread Alexandru Ardelean
From: Mircea Caprioru This patch adds support for vco maximum and minimum ranges in accordance with fpga speed grade, voltage, device package, technology and family. This new information is extracted from two new registers implemented in the ip core: ADI_REG_FPGA_INFO and ADI_REG_FPGA_VOLTAGE, wh