Re: [PATCH v5] mfd: da9063: Support SMBus and I2C mode

2021-03-16 Thread Lee Jones
On Tue, 16 Mar 2021, Jonas Mark (BT-FIR/ENG1-Grb) wrote: > Hi Lee, > > > Code looks good to me now, thanks. > > > > However, this doesn't look like it would pass checkpatch. > > > > Have you tried to build with W=1 and checkpatch? > > Yes, we used checkpatch.pl. > > $

Re: [PATCH v5] mfd: da9063: Support SMBus and I2C mode

2021-03-16 Thread Lee Jones
On Tue, 16 Mar 2021, Jonas Mark (BT-FIR/ENG1-Grb) wrote: > Hi Lee, > > > Code looks good to me now, thanks. > > > > However, this doesn't look like it would pass checkpatch. > > > > Have you tried to build with W=1 and checkpatch? > > Yes, we used checkpatch.pl. > > $

[PATCH v5] mfd: da9063: Support SMBus and I2C mode

2021-03-16 Thread Jonas Mark (BT-FIR/ENG1-Grb)
Hi Lee, > Code looks good to me now, thanks. > > However, this doesn't look like it would pass checkpatch. > > Have you tried to build with W=1 and checkpatch? Yes, we used checkpatch.pl. $ ./scripts/checkpatch.pl 0001-mfd-da9063-Support-SMBus-and-I2C-mode.v5 total: 0 errors, 0

Re: [PATCH v5] mfd: da9063: Support SMBus and I2C mode

2021-03-16 Thread Lee Jones
On Mon, 15 Mar 2021, Mark Jonas wrote: > From: Hubert Streidl > > By default the PMIC DA9063 2-wire interface is SMBus compliant. This > means the PMIC will automatically reset the interface when the clock > signal ceases for more than the SMBus timeout of 35 ms. > > If the I2C driver / device

Re: [PATCH v5] mfd: da9063: Support SMBus and I2C mode

2021-03-15 Thread Wolfram Sang
On Mon, Mar 15, 2021 at 05:09:03PM +0100, Mark Jonas wrote: > From: Hubert Streidl > > By default the PMIC DA9063 2-wire interface is SMBus compliant. This > means the PMIC will automatically reset the interface when the clock > signal ceases for more than the SMBus timeout of 35 ms. > > If the

[PATCH v5] mfd: da9063: Support SMBus and I2C mode

2021-03-15 Thread Mark Jonas
From: Hubert Streidl By default the PMIC DA9063 2-wire interface is SMBus compliant. This means the PMIC will automatically reset the interface when the clock signal ceases for more than the SMBus timeout of 35 ms. If the I2C driver / device is not capable of creating atomic I2C transactions, a