[ Sending again in plain text ]
Noralf pointed me at fixed-factor-clock, and that works in our
(downstream) environment:
soc: soc {
...
uart1: uart@7e215040 {
compatible = "brcm,bcm2835-aux-uart", "ns16550";
reg = <0x7e215040 0x40>;
interrupt
> On 10.09.2015, at 17:48, Noralf Trønnes wrote:
>
> This looks interesting.
> But there's a challenge with the uart1 and the 8250 driver.
>
> Phil Elwell has this to say:
> This means that that UART1 isn't an exact clone of a 8250 UART.
> In a particular, the clock divisor is calculated differ
Den 09.09.2015 03:48, skrev Eric Anholt:
ker...@martin.sperl.org writes:
From: Martin Sperl
The BCM2835 contains 3 auxiliar devices:
* spi1
* spi2
* uart1
All of those 3 devices are enabled/disabled via a shared register,
which is set by default to be disabled.
Access to this register need
Alexander Stein writes:
> Hi,
> On Tuesday 08 September 2015 18:48:07, Eric Anholt wrote:
>> I finally had a chance to sit down and look at what the hardware's doing
>> with the enable bit (also, I've read a whole lot more of the hardware
>> now, so I'm a lot faster at answering questions like th
Hi,
On Tuesday 08 September 2015 18:48:07, Eric Anholt wrote:
> I finally had a chance to sit down and look at what the hardware's doing
> with the enable bit (also, I've read a whole lot more of the hardware
> now, so I'm a lot faster at answering questions like this). The enable
> bits are a clo
ker...@martin.sperl.org writes:
> From: Martin Sperl
>
> The BCM2835 contains 3 auxiliar devices:
> * spi1
> * spi2
> * uart1
>
> All of those 3 devices are enabled/disabled via a shared register,
> which is set by default to be disabled.
>
> Access to this register needs to get serialized.
>
> S
From: Martin Sperl
The BCM2835 contains 3 auxiliar devices:
* spi1
* spi2
* uart1
All of those 3 devices are enabled/disabled via a shared register,
which is set by default to be disabled.
Access to this register needs to get serialized.
So after several iterations of discussions with the foll
7 matches
Mail list logo
